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RT9553A Folha de dados(PDF) 11 Page - Richtek Technology Corporation |
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RT9553A Folha de dados(HTML) 11 Page - Richtek Technology Corporation |
11 / 12 page RT9553A 11 DS9553A-00 September 2014 www.richtek.com © Copyright 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. Thermal Considerations For continuous operation, do not exceed absolute maximum junction temperature. The maximum power dissipation depends on the thermal resistance of the IC package, PCB layout, rate of surrounding airflow, and difference between junction and ambient temperature. The maximum power dissipation can be calculated by the following formula : PD(MAX) = (TJ(MAX) − TA) / θJA where TJ(MAX) is the maximum junction temperature, TAis the ambient temperature, and θJAis the junction to ambient thermal resistance. For recommended operating condition specifications, the maximum junction temperature is 125 °C. The junction to ambient thermal resistance, θJA, is layout dependent. For WDFN-10L 3x3 package, the thermal resistance, θJA, is 30.5 °C/W on a standard JEDEC 51-7 four-layer thermal test board. The maximum power dissipation at TA = 25 °C can be calculated by the following formula : PD(MAX) = (125 °C − 25°C) / (30.5°C/W) = 3.27W for WDFN-10L 3x3 package The maximum power dissipation depends on the operating ambient temperature for fixed TJ(MAX) and thermal resistance, θJA. The derating curve in Figure 6 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Figure 6. Derating Curve of Maximum Power Dissipation 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 25 50 75 100 125 Ambient Temperature (°C) Four-Layer PCB Layout Considerations Layout is very important in RT9553A, if designed improperly, the PCB may radiate excessive noise. Certain points must be considered before starting a layout for the RT9553A. Connect a RC low pass filter to VCC. The recommended BOM of RC filter is 2.2 Ω and 0.1μF. Place the filter capacitor close to the IC. Current sense connections must always be made using Kelvin connections to ensure an accurate signal with the current limit resistor located at the device. All sensitive analog traces and components such as CSP, CSN, VCC, EN, PROCHOT, RESET and ILIM should be placed away form high voltage switching nodes to avoid coupling. Figure 5. UVP and RESET Indicator Illustrator EN VCC 3ms VCSP x (1/9) UVSET RESET 108%_UVSET Recovery Hysteresis Range |
Nº de peça semelhante - RT9553A |
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Descrição semelhante - RT9553A |
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