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AM50DL128BH70IS Folha de dados(PDF) 6 Page - Advanced Micro Devices |
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AM50DL128BH70IS Folha de dados(HTML) 6 Page - Advanced Micro Devices |
6 / 68 page 4 Am50DL128BH October 7, 2003 ADV ANCE I N FO RMAT I O N Figure 32. Pseudo SRAM Write Cycle—CE#1ps Control ............... 58 Figure 33. Pseudo SRAM Write Cycle— UB#s and LB#s Control................................................................... 59 Flash Erase And Programming Performance . . 60 Latchup Characteristics . . . . . . . . . . . . . . . . . . . 60 Package Pin Capacitance . . . . . . . . . . . . . . . . . . 60 Flash Data Retention . . . . . . . . . . . . . . . . . . . . . . 61 pSRAM Data Retention . . . . . . . . . . . . . . . . . . . . 62 pSRAM Power on and Deep Power Down . . . . . 62 Figure 34. Deep Power-down Timing............................................. 62 Figure 35. Power-on Timing........................................................... 62 pSRAM Address Skew . . . . . . . . . . . . . . . . . . . . . 63 Figure 36. Read Address Skew ..................................................... 63 Figure 37. Write Address Skew...................................................... 63 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 64 FTA073—73-Ball Fine-Pitch Grid Array 8 x 11.6 mm ............. 64 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 65 |
Nº de peça semelhante - AM50DL128BH70IS |
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Descrição semelhante - AM50DL128BH70IS |
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