MPC961C

TIMING SOLUTIONS

DL207 — Rev 0

7

MOTOROLA

Table 8: Confidence Facter CF

CF

Probability of clock edge within the distribution

± 1s

0.68268948

± 2s

0.95449988

± 3s

0.99730007

± 4s

0.99993663

± 5s

0.99999943

± 6s

0.99999999

The feedback trace delay is determined by the board

layout and can be used to fine-tune the effective delay

through each device. In the following example calculation a

I/O jitter confidence factor of 99.7%

(

± 3s) is assumed,

resulting in a worst case timing uncertainty from input to any

output of -275 ps to 315 ps relative to CCLK:

tSK(PP) =

[–80ps...120ps] + [–150ps...150ps] +

[(15ps

@ –3)...(15ps @ 3)] + tPD, LINE(FB)

tSK(PP) =

[–275ps...315ps] + tPD, LINE(FB)

Due to the frequency dependence of the I/O jitter,

Figure 8. “Max. I/O Jitter versus frequency” can be used for

a more precise timing performance analysis.

Figure 8. Max. I/O Jitter versus frequency

Power Consumption of the MPC961C and Thermal

Management

The MPC961C AC specification is guaranteed for the

entire operating frequency range up to 200 MHz. The

MPC961C power consumption and the associated long-term

reliability may decrease the maximum frequency limit,

depending on operating conditions such as clock frequency,

supply voltage, output loading, ambient temperature, vertical

convection and thermal conductivity of package and board.

This section describes the impact of these parameters on the

junction temperature and gives a guideline to estimate the

MPC961C die junction temperature and the associated

device reliability. For a complete analysis of power

consumption as a function of operating conditions and

associated long term device reliability please refer to the

application note AN1545. According the AN1545, the

long-term device reliability is a function of the die junction

temperature:

Table 9: Die junction temperature and MTBF

Junction temperature (

°C)

MTBF (Years)

100

20.4

110

9.1

120

4.2

130

2.0

Increased power consumption will increase the die

junction temperature and impact the device reliability

(MTBF). According to the system-defined tolerable MTBF,

the die junction temperature of the MPC961C needs to be

controlled and the thermal impedance of the board/package

should be optimized. The power dissipated in the MPC961C

is represented in equation 1.

Where ICCQ is the static current consumption of the

MPC961C, CPD is the power dissipation capacitance per

output,

load, N is the number of active outputs (N is always 27 in

case of the MPC961C). The MPC961C supports driving

transmission lines to maintain high signal integrity and tight

timing parameters. Any transmission line will hide the lumped

capacitive load at the end of the board trace, therefore,

zero for controlled transmission line systems and can be

eliminated from equation 1. Using parallel termination output

termination results in equation 2 for power dissipation.

In equation 2, P stands for the number of outputs with a

parallel or thevenin termination, VOL, IOL, VOH and IOH are a

function of the output termination technique and DCQ is the

clock signal duty cyle. If transmission lines are used

zero in equation 2 and can be eliminated. In general, the use

of controlled transmission line techniques eliminates the

impact of the lumped capacitive loads at the end lines and

greatly reduces the power dissipation of the device. Equation

3 describes the die junction temperature TJ as a function of

the power consumption.

P

I

N

@ C

M

@ V

CC

Equation 1

P

I

N

@ C

M

)

P

DC

Equation 3

f

1

CC

@

T

R

thja

* I

Equation 4

Freescale Semiconductor, Inc.

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