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ACT88320QI-T Folha de dados(PDF) 23 Page - Active-Semi, Inc |
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ACT88320QI-T Folha de dados(HTML) 23 Page - Active-Semi, Inc |
23 / 50 page ACT88320QI-T Rev 2.0, 20-Dec-2017 Innovative PowerTM www.active-semi.com ActiveSwitcherTM is a trademark of Active-Semi. Copyright © 2017 Active-Semi, Inc 23 sequence. If an output is in current limit, it is possible that its voltage can drop below the UV threshold which also shuts down all outputs. If that behavior is not desired, mask the appropriate fault bit. Each output still provides its real-time UV/OV fault status via its fault flag, even if the fault is masked. Masking an OV/UV fault just prevents the fault from being reported via the IRQ pin. A UV/OV fault condition pulls the nRESET pin low. Note that the IC’s specific CMI sets the defaults for which regulators mask the UV and OV fault conditions. Output Current Limit The ACT88320 incorporates a three level overcurrent protection scheme for the buck converters and a single level scheme for the LDOs. For the buck converters, the overcurrent current threshold refers to the peak switch current. The first protection level is when a buck converter’s peak switch current reaches 75% of the Cycle-by-Cycle current limit threshold for greater than 16 switching cycles. Under this condition, the IC reports the fault via the appropriate fault flag bit. If the fault is unmasked, it asserts the nIRQ pin. The next level is when the current increases to the Cycle-by-Cycle threshold. The buck converter limits the peak switch current in each switching cycle. This reduces the effective duty cycle and causes the output voltage to drop, potentially creating an undervoltage condition. When the overcurrent condition results in an UV condition, and UV is not masked, the IC turns off all supplies for 100ms and restarts. The third level is when the peak switch current reaches 122% of the Cycle-by- Cycle current limit threshold. This immediately shuts down the regulator and waits 14ms before restarting. For LDOs, the overcurrent thresholds are set by each LDO’s Output Current Limit setting. When the output current reaches the Current Limit threshold, the LDO limits the output current. This reduces the output voltage, creating an undervoltage condition, causing all supplies to turn off for 100ms before restarting. The overcurrent fault limits for the buck converters are adjustable via I2C. LDO current limit is fixed. Overcurrent fault reporting can be masked via I2C, but the overcurrent limits are always active and will shut down the IC when exceeded. Thermal Warning and Thermal Shutdown The ACT88320 monitors its internal die temperature and reports a warning via nIRQ when the temperature rises above the Thermal Interrupt Threshold of typically 135 deg C. It reports a fault when the temperature rises above the Thermal Shutdown Temperature of typically 160 deg C. A temperature fault shuts down all outputs unless the fault is masked. Both the fault and the warn- ing can be masked via I2C. The temperature warning and fault flags still provide real-time status even if the faults are masked. Masking just prevents the faults from being reported via the nIRQ pin. INRUSH CONTROL When power is applied to the system, the OVSNS pin checks for under voltage and over voltage. If the input voltage is within spec, the IC turns on an external N- Channel MOSFET, which supplies power to the VIN and AVIN pins. VIN and AVIN power the IC, the buck con- verters, and the LDOs. The IC controls the voltage ramp on VIN to control the inrush current from the input volt- age. The gate drive voltage is typically V, which requires a 12V gate drive FET. OVP CONTROL When over voltage is detected on the OVSNS pin, it generates a fault condition to shutdown the inrush con- troller. The overvoltage condition latches VIN output off until the overvoltage condition is removed. When the in- put voltage is within specified limits, the IC automatically restarts. An OVP condition is not reported via I2C. Input Current Limit An external sense resistor can be used between OVSNS and OVSNS_M to detect the input current to VIN. An overcurrent warning occurs when the voltage across the sense resistor reaches 72.5% of the current limit threshold. The current warning asserts nIRQ low. The current limit warning can be masked with I2C bit IN- RUSH_ILIM_MSK. An overcurrent condition occurs when the voltage across the sense resistor reaches the current limit threshold voltage of 85mV. OVGATE mod- ulates the external MOSFET gate voltage to regulate the maximum current through the MOSFET and protect against an overcurrent condition. If the system attempts to pull more current, the VIN voltage starts to drop. If VIN drops below the programmed SYSMON setting, the IC asserts nIRQ. Pin Descriptions Many of the ACT88320 input and output pins are con- figurable via CMI configurations. The following descrip- tions are refer to basic pin functions and capabilities. Refer to the CMI Options section in the back of the datasheet for specific pin functionality for each CMI. |
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Descrição semelhante - ACT88320QI-T |
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