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SLA7052M Folha de dados(PDF) 5 Page - Allegro MicroSystems

Nome de Peças SLA7052M
Descrição Electrónicos  UNIPOLAR STEPPER-MOTOR TRANSLATOR/PWM DRIVER
Download  12 Pages
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Fabricante Electrônico  ALLEGRO [Allegro MicroSystems]
Página de início  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

SLA7052M Folha de dados(HTML) 5 Page - Allegro MicroSystems

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SLA7052M
UNIPOLAR STEPPER-MOTOR
TRANSLATOR/PWM DRIVER
www.allegromicro.com
5
Motor
Driver
Functional description
Device operation. The SLA7052M is a complete
stepper-motor driver with built-in translator for easy
operation with minimal control lines. It is designed to
operate unipolar stepper motors in full-step or half-step
modes. The current in each pair of outputs, all n-channel
MOSFETs, is regulated with internal fixed off-time pulse-
width modulated (PWM) control circuitry.
When a step command signal occurs on the clock input
the translator automatically sequences to the next step.
Clock (step) input. A low-to-high transition on the
clock input sequences the translator and advances the
motor one increment. The hold state is done by stopping
the CLOCK input regardless of the input level
Full/half-step select. This logic-level input sets the
translator step mode. A logic low is two-phase, full step; a
logic high is half step. Changes to this input do not take
effect until the rising edge of the clock input.
CW/CCW (direction) input. This logic-level input sets
the translator step direction. Changes to this input do not
take effect until the rising edge of the clock input.
Internal PWM current control. Each pair of outputs is
controlled by a fixed off-time PWM current-control circuit
that limits the load current to a desired value (I
TRIP).
Initially, an output is enabled and current flows through
the motor winding and R
S. When the voltage across the
current-sense resistor equals the reference voltage, the
current-sense comparator resets the PWM latch, which
turns off the driver for the fixed off time during which the
load inductance causes the current to recirculate for the off
time period. The driver is then re-enabled and the cycle
repeats.
Synchronous operation mode. This function pre-
vents occasional motor noise during a “hold” state, which
normally results from asynchronous PWM operation of
both motor phases. A logic high at the SYNC input is
synchronous operation; a logic low is asynchronous
operation. The use of synchronous operation during
normal stepping is not recommended because it produces
less motor torque and can cause motor vibration due to
stair-case current.
Sleep mode. Applying a voltage greater than 2 V to the
REF pin disables the outputs and puts the motor in a free
state (coast). This function is used to minimize power
consumption when not in use. It disables much of the
internal circuitry including the output MOSFETs and
regulator. When coming out of sleep mode, wait 100 µs
before issuing a step command to allow the internal
circuitry to stabilize.


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