2N3773 2N6609

4

Motorola Bipolar Power Transistor Device Data

30

3.0

Figure 7. Forward Bias Safe Operating Area

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

20

10

5.0

3.0

2.0

1.0

0.5

0.03

5.0 7.0

10

20

30

50

300

BONDING WIRE LIMIT

THERMAL LIMIT

@ TC = 25°C, SINGLE PULSE

SECOND BREAKDOWN LIMIT

70

0.3

0.2

dc

10

µs

100

µs

100 ms

0.1

0.05

100

200

40

µs

200

µs

1.0 ms

500 ms

There are two limitations on the power handling ability of a

transistor: average junction temperature and second break-

down. Safe operating area curves indicate IC – VCE limits of

the transistor that must be observed for reliable operation:

i.e., the transistor must not be subjected to greater dissipa-

tion than the curves indicate.

The data of Figure 7 is based on TJ(pk) = 200_C; TC is

variable depending on conditions. Second breakdown pulse

limits are valid for duty cycles to 10% provided TJ(pk)

< 200

_C. At high case temperatures, thermal limitations will

reduce the power that can be handled to values less than the

limitations imposed by second breakdown.

100

80

60

40

0

20

0

40

80

120

160

200

Figure 8. Power Derating

TC, CASE TEMPERATURE (°C)

THERMAL

DERATING