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CXA7002R Folha de dados(PDF) 14 Page - Sony Corporation |
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CXA7002R Folha de dados(HTML) 14 Page - Sony Corporation |
14 / 47 page – 14 – CXA7002R tBUF tHD;STA S P tLOW tR tHIGH tSU;DAT tSU;STA tSU;DAT P Sr tSU;STO tF tHD;STA Digital Characteristics (1) I2C Interface The I2C interface is compliant with Philips I2C Fast Mode specification (data April 1995). The interface is also capable of interfacing to +3.3V or +5V logic levels. Item High level input voltage Low level input voltage Low level output voltage Hysteresis of schmitt trigger input Spike suppression Fall time for SDA line SCL clock frequency Bus free time between a stop and start Hold time (repeated start condition) Low period of SCL clock High period of SCL clock Setup time for a repeated start condition Data hold time Data setup time Setup time for stop condition Symbol VIH VIL VOL VHYST tSP tF tSCL tBUF tHD;STA tLOW tHIGH tSU;SDA tHD;DAT tSU;DAT tSU;STO Condition With SDA, 3mA current supplied With SDA, 6mA current supplied VIH – VIL 400pF bus load I2C bus line requirement I2C bus line requirement I2C bus line requirement I2C bus line requirement I2C bus line requirement I2C bus line requirement I2C bus line requirement I2C bus line requirement I2C bus line requirement Min. 2.3 0 0 0 — — — 0 1.3 0.6 1.3 0.6 0.6 0 100 0.6 Typ. — — — — 0.5 — — — — — — — — — — — Max. 5.5 1.5 0.4 0.6 — 50 300 400 — — — — — 0.9 — — Unit V V V V ns ns kHz µs µs µs µs µs µs µs µs |
Nº de peça semelhante - CXA7002R |
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Descrição semelhante - CXA7002R |
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