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CS4265-CNZ Folha de dados(PDF) 3 Page - Cirrus Logic |
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CS4265-CNZ Folha de dados(HTML) 3 Page - Cirrus Logic |
3 / 53 page CS4265 DS657A2 3 TABLE OF CONTENTS 1. PIN DESCRIPTIONS ............................................................................................................... 5 2. CHARACTERISTICS AND SPECIFICATIONS ....................................................................... 7 SPECIFIED OPERATING CONDITIONS ................................................................................. 7 ABSOLUTE MAXIMUM RATINGS ........................................................................................... 7 DAC ANALOG CHARACTERISTICS ....................................................................................... 8 DAC COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE.................. 9 ADC ANALOG CHARACTERISTICS ..................................................................................... 11 ADC ANALOG CHARACTERISTICS ..................................................................................... 13 ADC DIGITAL FILTER CHARACTERISTICS......................................................................... 14 DC ELECTRICAL CHARACTERISTICS ................................................................................ 15 DIGITAL INTERFACE CHARACTERISTICS ......................................................................... 16 SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT................................................. 17 SWITCHING CHARACTERISTICS - I²C CONTROL PORT................................................... 20 3. TYPICAL CONNECTION DIAGRAM .................................................................................... 21 4. APPLICATIONS .................................................................................................................... 22 4.1 Recommended Power-Up Sequence ............................................................................. 22 4.2 System Clocking ............................................................................................................. 22 4.2.1 Master Clock ...................................................................................................... 22 4.2.2 Master Mode ...................................................................................................... 23 4.2.3 Slave Mode ........................................................................................................ 23 4.3 High Pass Filter and DC Offset Calibration .................................................................... 23 4.4 Analog Input Multiplexer, PGA, and Mic Gain ................................................................ 24 4.5 Input Connections ........................................................................................................... 24 4.5.1 Pseudo-Differential Input ................................................................................... 24 4.6 Output Connections ........................................................................................................25 4.7 Output Transient Control ................................................................................................ 25 4.7.1 Power-up ............................................................................................................ 25 4.7.2 Power-down ....................................................................................................... 25 4.7.3 Serial Interface Clock Changes ......................................................................... 25 4.8 DAC Serial Data Input Multiplexer .................................................................................. 26 4.9 De-Emphasis Filter ......................................................................................................... 26 4.10 Internal Digital Loopback .............................................................................................. 26 4.11 Mute Control ................................................................................................................. 26 4.12 AES3 Transmitter .........................................................................................................27 4.12.1 TxOut Driver ..................................................................................................... 27 4.12.2 Mono Mode Operation ..................................................................................... 27 4.13 I²C Control Port Description and Timing ....................................................................... 28 4.14 Status Reporting ........................................................................................................... 29 4.15 Reset ........................................................................................................................... 29 4.16 Synchronization of Multiple Devices ............................................................................. 30 4.17 Grounding and Power Supply Decoupling .................................................................... 30 4.18 Package Considerations ............................................................................................... 30 5. REGISTER QUICK REFERENCE ......................................................................................... 31 6. REGISTER DESCRIPTION ................................................................................................... 33 6.1 Chip ID - Register 01h ....................................................................................................33 6.2 Power Control - Address 02h ......................................................................................... 33 6.3 DAC Control - Address 03h ............................................................................................ 34 6.4 ADC Control - Address 04h ............................................................................................ 34 6.5 MCLK Frequency - Address 05h .................................................................................... 36 6.6 Signal Selection - Address 06h ...................................................................................... 36 6.7 Channel A PGA Control - Address 07h .......................................................................... 36 6.8 Channel B PGA Control - Address 08h .......................................................................... 37 |
Nº de peça semelhante - CS4265-CNZ |
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Descrição semelhante - CS4265-CNZ |
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