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CS4384-DQZ Folha de dados(PDF) 6 Page - Cirrus Logic

Nome de Peças CS4384-DQZ
Descrição Electrónicos  103 dB, 192 kHz 8-Channel D/A Converter
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Fabricante Electrônico  CIRRUS [Cirrus Logic]
Página de início  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4384-DQZ Folha de dados(HTML) 6 Page - Cirrus Logic

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DS620A1
CS4384
1. PIN DESCRIPTION
Pin Name
#
Pin Description
VD
4
Digital Power (Input) - Positive power supply for the digital section.
GND
5
31
Ground (Input) - Ground reference. Should be connected to analog ground.
MCLK
6
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters. Table 1 illustrates
several standard audio sample rates and the required master clock frequency.
LRCK
7
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on the serial
audio data line. The frequency of the left/right clock must be at the audio sample rate, Fs.
SDIN1
SDIN2
SDIN3
SDIN4
8
11
13
14
Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
SCLK
9
Serial Clock (Input) - Serial clock for the serial audio interface.
VLC
18
Control Port Power (Input) - Determines the required signal level for the control port.
RST
19
Reset (Input) - The device enters a low power mode and all internal registers are reset to their default
settings when low.
FILT+
20
Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
Requires the capacitive decoupling to analog ground, as shown in the Typical Connection Diagram.
VQ
21
Quiescent Voltage (Output) - Filter connection for internal quiescent voltage.
MUTEC1
MUTEC234
41
22
Mute Control (Output) - These pins are intended to be used as a control for external mute circuits to
prevent the clicks and pops that can occur in any single supply system.
AOUT1
AOUT2
AOUT3
AOUT4
AOUT5
AOUT6
AOUT7
AOUT8
39
38
35
34
29
28
25
24
Analog Output (Output) - The full scale analog output level is specified in the Analog Characteristics
specification table.
GND
TST_OUT
AOUT5
TST_OUT
AOUT4
VA
TST_OUT
AOUT6
TST_OUT
AOUT7
6
2
4
8
10
1
3
5
7
9
11
12
13 14 15 16 17 18 19 20 21 22 23 24
31
35
33
29
27
36
34
32
30
28
26
25
48 47 46 45 44 43 42 41 40 39 38 37
MCLK
DSD2
VD
SDIN1
M4(TST)
DSD3
DSD1
GND
SCLK
SDIN2
M3(TST)
LRCK
CS4384
AOUT3
TST_OUT


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