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BQ79600-Q1 Folha de dados(PDF) 3 Page - Texas Instruments

Nome de Peças BQ79600-Q1
Descrição Electrónicos  BQ79600-Q1 Automotive SPI/UART Communication Interface Functional-Safety Compliant With Automatic Host Wakeup
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Página de início  http://www.ti.com
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5 Pin Configuration and Functions
1
16
2
15
BAT
3
14
4
13
5
12
COMLN
6
11
7
8
COMHP
COMLP
NFAULT
VIO
CVDD
9
10
nUART/SPI (SPI_RDY)
16-TSSOP
nCS
MOSI/RX
MISO/TX
5.1x6.6x1.2(mm)
No thermal pad
DVDD
INH
GND
SCLK
COMHN
Figure 5-1. PW Package 16-Pin TSSOP Top View
Pin Functions
PIN
TYPE(1)
DESCRIPTION
NAME
NO.
VIO
3
P
Power supply input for UART/SPI input/output pins. Decouple with a 0.1μF capacitor to GND.
VIO should be powered before SCLK, nCS, RX/MOSI, TX/MISO, NFAULT, nUART/SPI
(SPI_RDY) is driven.
SCLK
6
DI
SPI clock input. If SPI interface is used, this pin is connected to SPI master controller. Connect
to GND with a 10-100kohm pull-down resistor. If not used, connect to GND.
nCS
7
DI
Active low chip select pin for SPI interface. Connect to VIO with 10-100kohm pull-up resistor in
SPI mode. Cannot hardwire to GND in SPI mode. Connect to GND in UART mode.
RX/MOSI
4
DI
UART receiver input or SPI master out slave in. Connect to VIO with a 10-100kohm pull-up
resistor. Don't leave it unconnected.
TX/MISO
5
DO
UART transmitter output or SPI master in slave out. Pull up to VIO with a 10-100kohm pull-up
resistor at MCU side. MISO pin drives high in SPI idle mode, cannot directly support SPI
multidrop, if multidrop is needed, add a tri-state buffer between BQ79600-Q1 and MCU.
NFAULT
2
DO
Fault indication output. Open drain active low. Pull up to VIO with 100kohm resistor. Connect
NFAULT to host MCU GPIO. If not used, connect to GND.
nUART/SPI
(SPI_RDY)
8
DI/O
If used as UART mode, connect this pin to GND. If used as SPI mode, connect to VIO through
10-100kohm pull up resistor and connect this pin to MCU GPIO. This pin is used as an input pin
to select SPI or UART interface before device finishes wakeup/reset initialization (SPI
communication is ready). If SPI mode is selected, SPI_RDY has to be used by host to decide if
read/write can be initiated or needing further wait. Refer to Section 7.3.2.1.2.2.1 details.
DVDD
1
P
1.8V regulated output. DVDD supplies the internal digital circuits. Bypass DVDD with a 0.22μF
(recommended) or a 0.47μF capacitor to GND.
GND
9
P
Ground.
CVDD
14
P
Dedicated 5V supply used for the daisy chain communications. Decouple with a 0.22μF
(recommended) or a 0.47μF to GND.
COMHN
12
AC-I/O
This is an AC coupled bi-directional I/O pin for daisy chain (VIF) communication. Do not apply
external DC voltage to this pin. Shall connect to COMLN/P of adjacent device through proper
isolation, see Section 7.3.2.1.1. Leave unconnected if (Ring Architecture) not used.
COMHP
13
AC-I/O
COMLN
11
AC-I/O
This is an AC coupled bi-directional I/O pin for daisy chain (VIF) communication. Do not apply
external DC voltage to this pin. Shall connect to COMHN/P of adjacent device through proper
isolation, see Section 7.3.2.1.1. Leave unconnected if (Ring Architecture) not used.
COMLP
10
AC-I/O
INH
16
HV-O
Inhibit pin (PMOS open drain) to control system voltage regulators, connect 100kohm resistor
to GND. If reverse wake up feature is not used, connect this pin to BAT pin. Don’t leave this pin
floating.
BAT
15
HV-P
Battery supply Input. Supply internal LDOs and wakeup circuit. Connect to external supply
through 10ohm resistor. Bypass to GND with 0.1μF.
(1)
DI = digital input, DO = digital output, HV = high voltage
www.ti.com
BQ79600-Q1
SLUSDS1A – NOVEMBER 2019 – REVISED AUGUST 2020
Copyright © 2020 Texas Instruments Incorporated
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