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RM48L940 Folha de dados(PDF) 6 Page - Texas Instruments

Nome de Peças RM48L940
Descrição Electrónicos  RM48Lx40 16- and 32-Bit RISC Flash Microcontroller
Download  174 Pages
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
Logo TI - Texas Instruments

RM48L940 Folha de dados(HTML) 6 Page - Texas Instruments

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RM48L940, RM48L740, RM48L540
SPNS175C – APRIL 2012 – REVISED JUNE 2015
www.ti.com
Table of Contents
1
Device Overview
......................................... 1
6.12
Parity Protection for Peripheral RAMs
.............. 82
1.1
Features
.............................................. 1
6.13
On-Chip SRAM Initialization and Testing
........... 84
1.2
Applications
........................................... 2
6.14
External Memory Interface (EMIF)
.................. 86
1.3
Description
............................................ 3
6.15
Vectored Interrupt Manager
......................... 93
1.4
Functional Block Diagram
............................ 5
6.16
DMA Controller
...................................... 96
2
Revision History
......................................... 7
6.17
Real Time Interrupt Module
......................... 98
3
Device Comparison
..................................... 8
6.18
Error Signaling Module
............................. 100
4
Terminal Configuration and Functions
............. 9
6.19
Reset / Abort / Error Sources
...................... 104
4.1
PGE QFP Package Pinout (144-Pin)
................. 9
6.20
Digital Windowed Watchdog
....................... 106
4.2
ZWT BGA Package Ball-Map (337-Ball Grid Array)
10
6.21
Debug Subsystem
................................. 107
4.3
Terminal Functions
................................. 11
7
Peripheral Information and Electrical
Specifications
......................................... 118
5
Specifications
.......................................... 40
7.1
Peripheral Legend
................................. 118
5.1
Absolute Maximum Ratings
........................ 40
7.2
Multibuffered 12-Bit Analog-to-Digital Converter
.. 118
5.2
ESD Ratings
........................................ 40
7.3
General-Purpose Input/Output
..................... 129
5.3
Power-On Hours (POH)
............................. 40
7.4
Enhanced Next Generation High-End Timer
5.4
Recommended Operating Conditions
............... 41
(N2HET)
............................................ 130
5.5
Switching Characteristics for Clock Domains
....... 42
7.5
Controller Area Network (DCAN)
.................. 135
5.6
Wait States Required
............................... 42
7.6
Local Interconnect Network Interface (LIN)
........ 136
5.7
Power Consumption
................................. 43
7.7
Serial Communication Interface (SCI)
............. 137
5.8
Input/Output Electrical Characteristics
.............. 44
7.8
Inter-Integrated Circuit (I2C)
....................... 138
5.9
Thermal Resistance Characteristics
................ 45
7.9
Multibuffered / Standard Serial Peripheral
5.10
Output Buffer Drive Strengths
...................... 46
Interface
............................................ 141
5.11
Input Timings
........................................ 47
7.10
Ethernet Media Access Controller
................. 153
5.12
Output Timings
...................................... 47
8
Device and Documentation Support
.............. 157
5.13
Low-EMI Output Buffers
............................ 49
8.1
Device Support
..................................... 157
6
System Information and Electrical
8.2
Documentation Support
............................ 159
Specifications
........................................... 51
8.3
Related Links
...................................... 159
6.1
Device Power Domains
............................. 51
8.4
Community Resources
............................. 159
6.2
Voltage Monitor Characteristics
..................... 52
8.5
Trademarks
........................................ 159
6.3
Power Sequencing and Power On Reset
........... 53
8.6
Electrostatic Discharge Caution
................... 159
6.4
Warm Reset (nRST)
................................. 55
8.7
Glossary
............................................ 160
6.5
ARM Cortex-R4F CPU Information
................. 56
8.8
Device Identification Code Register
............... 160
6.6
Clocks
............................................... 60
8.9
Die Identification Registers
....................... 161
6.7
Clock Monitoring
.................................... 68
8.10
Module Certifications
............................... 162
6.8
Glitch Filters
......................................... 70
9
Mechanical Packaging and Orderable
6.9
Device Memory Map
................................ 71
Information
............................................. 167
6.10
Flash Memory
....................................... 79
9.1
Packaging Information
............................. 167
6.11
Tightly Coupled RAM (TCRAM) Interface Module
.. 82
6
Table of Contents
Copyright © 2012–2015, Texas Instruments Incorporated
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