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74ACT164 Folha de dados(PDF) 2 Page - National Semiconductor (TI) |
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74ACT164 Folha de dados(HTML) 2 Page - National Semiconductor (TI) |
2 / 6 page Functional Description The 74ACT164 is an edge-triggered 8-bit shift register with serial data entry and an output from each of the eight stages Data is entered serially through one of two inputs (A or B) either of these inputs can be used as an active High Enable for data entry through the other input An unused input must be tied High Each Low-to-High transition on the Clock (CP) input shifts data one place to the right and enters into Q0 the logical AND of the two data inputs (A B) that existed before the rising clock edge A Low level on the Master Reset (MR) input overrides all other inputs and clears the register asyn- chronously forcing all Q outputs Low Function Table Operating Inputs Outputs Mode MR ABQ0 Q1–Q7 Reset (Clear) L X X L L – L Shift H L L L Q0–Q6 HL H L Q0–Q6 HH L L Q0–Q6 HH H H Q0–Q6 H e High Voltage Levels L e Low Voltage Levels X e Immaterial Q e Lower case letters indicate the state of the referenced input or output one setup time prior to the Low-to-High clock transition Logic Diagram TLF11553 – 3 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays 2 |
Nº de peça semelhante - 74ACT164 |
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Descrição semelhante - 74ACT164 |
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