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BD9P105MUF-CE2 Folha de dados(PDF) 49 Page - Rohm

Nome de Peças BD9P105MUF-CE2
Descrição Electrónicos  3.5 V to 40 V Input, 1 A Single 2.2 MHz Buck DC/DC Converter For Automotive
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Fabricante Electrônico  ROHM [Rohm]
Página de início  http://www.rohm.com
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BD9P105MUF-CE2 Folha de dados(HTML) 49 Page - Rohm

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© 2019 ROHM Co., Ltd. All rights reserved.
28.Apr.2020 Rev.001
TSZ22111 • 15 • 001
BD9P1x5MUF-C Series
PCB Layout Design – continued
When designing the PCB layout, please pay extra attention to the following points.
The decoupling capacitors (CIN1) for the VIN pin (pin 20) and the PVIN pins (pin 1, 2) should be placed closest to the
PVIN pins and the PGND pins (pin 4, 5). In addition, placing a capacitor 0.1
μF close to the PVIN pin results in
minimizing the high-frequency noise.
The device, the input capacitor, the output inductor and the output capacitor should be placed on the same side of the
board and the connection of each part should be made on the same layer.
Place the ground plane in a layer closest to the surface layer where the device is mounted.
The GND pin (pin 13) is the reference ground and the PGND pins are the power ground. These pins should be
connected through the back side of the device. The power systems ground should be connected to the ground plane
using as many vias as possible.
The capacitor for VREG should be placed closest to the VREG pin (pin 17), the GND pin and the PGND pin. As
shown in the Recommended Board Layout Example, it can be realized that connecting with the shortest distance for
the GND pin and the PGND pins by placing the capacitor for VREG on the closest to the VREG pin and wiring at the
back side of the IC.
Place Bootstrap capacitor CBST close to the device with short traces to the SW pins (pin 6, 7) and the BST pin (pin 8).
To minimize the emission noise from switching node, the distance between the SW pins to inductor should be as
short as possible and not to expand the copper area more than necessary.
Place the output capacitor close to the inductor and power ground area.
Make the feedback line from the output away from the inductor and the switching node. If this line is affected by
external noise, an error may be occurred in the output voltage or the control may become unstable. Therefore, move
the feedback line to back side layer of the board through via and connect it to the VOUT_SNS pin (pin 14
[BD9P105MUF-C], pin 15 [BD9P135MUF-C, BD9P155MUF-C]). When the VCC_EX function and the output
discharge function are used, connect it to the VCC_EX (pin 16) and the VOUT_DIS pin (pin 14 [BD9P135MUF-C,
BD9P155MUF-C]) as well, respectively.
10. RFB1 and RFB2 Feedback resistors are needed for BD9P105MUF-C. Place RFB1, RFB2 close to the FB pin (pin 15).
11. RFB0 is for measuring the frequency characteristic of the feedback. By inserting a resistor in RFB0, the frequency
characteristics (phase margin) of the feedback can be measured. RFB0 should be short-circuited for the normal use.
Figure 90. Recommended Board Layout Example (for BD9P1x5MUF-C)
( RFB0 )
Figure 91. The resistor for measuring the frequency characteristic of the feedback
Power Ground Area
Reference Ground Area

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