July 1999
4-73
STK16C68
8K x 8 AutoStorePlus™ nvSRAM
QuantumTrap™ CMOS
Nonvolatile Static RAM
FEATURES
• Transparent Data Save on Power Down
• Internal Capacitor Guarantees AutoStore™
Regardless of Power-Down Slew Rate
• Nonvolatile Storage without Battery Problems
• Directly Replaces 8K x 8 Static RAM, Battery-
Backed RAM or EEPROM
• 20ns, 25ns, 35ns and 45ns Access Times
• STORE to EEPROM Initiated by Software or
AutoStorePlus™ on Power Down
• RECALL to SRAM Initiated by Software or
Power Restore
• 10mA Typical I
CC at 200ns Cycle Time
• Unlimited READ, WRITE and RECALL Cycles
• 1,000,000 STORE Cycles to EEPROM
• 100-Year Data Retention over Full Industrial
Temperature Range
• No Data Loss from Undershoot
• Commercial and Industrial Temperatures
• 28-Pin 600 mil PDIP and 350 mil SOIC Packages
DESCRIPTION
The STK16C68 is a fast SRAM with a nonvolatile
EEPROM
element incorporated in each static memory
cell. The SRAM can be read and written an unlimited
number of times, while independent nonvolatile data
resides in EEPROM. Data transfers from the SRAM to
the EEPROM (the STORE operation) can take place
automatically on power down. An internal capacitor
guarantees the STORE operation regardless of power-
down slew rate. Transfers from the EEPROM to the
SRAM
(the RECALL operation) take place automatically
on restoration of power. Initiation of STORE and
RECALL
cycles can also be controlled by entering con-
trol sequences on the SRAM inputs. The STK16C68 is
pin-compatible with 8k x 8 SRAMs and battery-backed
SRAM
s, allowing direct substitution while enhancing
performance. The STK12C68, which uses an external
capacitor, and the STK15C68, which uses charge
stored in system capacitance, are alternatives for sys-
tems needing AutoStore™ operation.
BLOCK DIAGRAM
COLUMN I/O
COLUMN DEC
STATIC RAM
ARRAY
128 x 512
EEPROM ARRAY
128 x 512
STORE/
RECALL
CONTROL
STORE
RECALL
POWER
CONTROL
A5
A6
A9
A11
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
SOFTWARE
DETECT
VCC
A0 - A12
G
E
W
A8
A7
A10
A3
A2
A0 A1
A4
INTERNAL
CAPACITOR
PIN NAMES
A0 - A12
Address Inputs
W
Write Enable
DQ0 - DQ7
Data In/Out
E
Chip Enable
G
Output Enable
VCC
Power (+ 5V)
VSS
Ground
PIN CONFIGURATIONS
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
VCC
NC
A8
A9
A11
G
W
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
28 - 600 PDIP
28 - 350 SOIC*
*see order info
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