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TSC51C2XXXA12IBB Folha de dados(PDF) 5 Page - TEMIC Semiconductors |
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TSC51C2XXXA12IBB Folha de dados(HTML) 5 Page - TEMIC Semiconductors |
5 / 28 page TSC8051C2 Rev. A (10 Jan. 97) 5 Preview MATRA MHS ALE The Address Latch Enable output signal occurs twice each machine cycle except during external data memory access. The negative edge of ALE strobes the address into external data memory or program memory. ALE can sink and source 8 LS TTL loads. If desired, ALE operation can be disabled by setting bit 0 of SFR location AFh (MSCON). With the bit set, ALE is active only during MOVX instruction and external fetches. Otherwise the pin is pulled low. EA When the External Access input is held high, the CPU executes out of internal program memory (unless the Program Counter exceeds 1FFFh). When EA is held low the CPU executes only out of external program memory. must not be left floating. PSEN The Program Store Enable output signal remains high during internal program memory. An active low output occurs during an external program memory fetch. PSEN can sink and source 8 LS TTL loads. XTAL1 Input to the inverting oscillator amplifier and input to the external clock generator circuits. XTAL2 Output from the inverting oscillator amplifier. This pin should be non–connected when external clock is used. |
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