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SI2110 Folha de dados(PDF) 8 Page - Silicon Laboratories |
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SI2110 Folha de dados(HTML) 8 Page - Silicon Laboratories |
8 / 80 page Si2107/08/09/10 8 Preliminary Rev. 0.7 Figure 2. MPEG-TS (Rising Launch and Capture) Timing Diagram Table 8. MPEG-TS Specifications (Rising Launch and Capture) Parameter Symbol Test Condition Min Typ Max Unit Clock cycle time tcycle Serial mode 11.3 — 28.6 ns Parallel mode 77 — 8000 ns Clock low time tclow Serial mode (TSSCR = 11) 5.1 — 6.9 ns Serial mode (TSSCR = 00) 12.0 — 15.8 ns Parallel mode 39 — 4000 ns Clock high time tchigh Serial mode (TSSCR = 01) 5.1 — 6.9 ns Serial mode (TSSCR = 11) 12.0 — 15.8 ns Parallel mode 39 — 4000 ns Hold time thold Normal operation — 0 — ns Data delayed (TSDD = 1) — 1.5 — ns Clock Delayed (TSCD = 1) — –1.5 — ns Setup time tsetup Normal operation — tcycle –1.5 — ns Data delayed (TSDD = 1) — tcycle –3.0 — ns Clock Delayed (TSCD = 1) — tcycle —ns Access time taccess —1.5 — ns TS_CLK TS_DATA tcycle thold tsetup taccess L C |
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