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74ALVCH16623DGG Folha de dados(PDF) 10 Page - NXP Semiconductors |
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74ALVCH16623DGG Folha de dados(HTML) 10 Page - NXP Semiconductors |
10 / 16 page 1999 Sep 20 10 Philips Semiconductors Product specification 16-bit transceiver with dual enable; 3-state 74ALVCH16623 Fig.7 3-state enable and disable times for nOEAB times. handbook, full pagewidth MNA313 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH nOEAB input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM Fig.8 Load circuitry for switching times. handbook, full pagewidth open GND 50 pF 2 × VCC VCC VI VO MNA296 D.U.T. CL RT RL 500 Ω RL 500 Ω PULSE GENERATOR S1 VCC VI <2.7 V VCC 2.7 to 3.6 V 2.7 V TEST S1 tPLH/tPHL open tPLZ/tPZL 2 × VCC tPHZ/tPZH GND Definitions for test circuit. CL = load capacitance including jig and probe capacitance (See Chapter “AC characteristics”). RL = load resistance. RT = termination resistance should be equal to the output impedance Zo of the pulse generator. |
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