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74HCT160 Folha de dados(PDF) 3 Page - NXP Semiconductors |
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74HCT160 Folha de dados(HTML) 3 Page - NXP Semiconductors |
3 / 9 page December 1990 3 Philips Semiconductors Product specification Presettable synchronous BCD decade counter; asynchronous reset 74HC/HCT160 ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 1 MR asynchronous master reset (active LOW) 2 CP clock input (LOW-to-HIGH, edge-triggered) 3, 4, 5, 6 D0 to D3 data inputs 7 CEP count enable input 8 GND ground (0 V) 9 PE parallel enable input (active LOW) 10 CET count enable carry input 14, 13, 12, 11 Q0 to Q3 flip-flop outputs 15 TC terminal count output 16 VCC positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. |
Nº de peça semelhante - 74HCT160 |
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Descrição semelhante - 74HCT160 |
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