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74HC242 Folha de dados(PDF) 2 Page - NXP Semiconductors |
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74HC242 Folha de dados(HTML) 2 Page - NXP Semiconductors |
2 / 7 page December 1990 2 Philips Semiconductors Product specification Quad bus transceiver; 3-state; inverting 74HC/HCT242 FEATURES • Inverting 3-state outputs • 2-way asynchronous data bus communication • Output capability: bus driver • ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT242 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT242 are quad bus transceivers featuring inverting 3-state bus compatible outputs in both send and receive directions. They are designed for 4-line asynchronous 2-way data communications between data buses. The output enable inputs (OEA and OEB) can be used to isolate the buses. The “242” is similar to the “243” but has inverting outputs. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi +∑ (CL × VCC2 × fo) where: fi = input frequency in MHz fo = output frequency in MHz ∑ (CL × VCC2 × fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.5 V ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”. SYMBOL PARAMETER CONDITIONS TYPICAL UNIT HC HCT tPHL/ tPLH propagation delay An to Bn; Bn to An CL = 15 pF; VCC = 5 V 7 10 ns CI input capacitance 3.5 3.5 pF CI/O input/output capacitance 10 10 pF CPD power dissipation capacitance per transceiver notes 1 and 2 29 32 pF |
Nº de peça semelhante - 74HC242 |
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Descrição semelhante - 74HC242 |
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