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74HCT4015 Folha de dados(PDF) 7 Page - NXP Semiconductors |
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74HCT4015 Folha de dados(HTML) 7 Page - NXP Semiconductors |
7 / 8 page December 1990 7 Philips Semiconductors Product specification Dual 4-bit serial-in/parallel-out shift register 74HC/HCT4015 AC WAVEFORMS Fig.6 Waveforms showing the clock (nCP) to output (nQn) propagation delays, the clock pulse width, the output transition times and the maximum clock frequency. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.7 Waveforms showing the master reset (nMR) pulse width, the master reset to output (nQn) propagation delay and the master reset to clock (nCP) removal time. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.8 Waveforms showing the data set-up and hold times for nD inputs. The shaded areas indicate when the input is permitted to change for predictable output performance. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. |
Nº de peça semelhante - 74HCT4015 |
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Descrição semelhante - 74HCT4015 |
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