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ADM1064ACP Folha de dados(PDF) 3 Page - Analog Devices |
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ADM1064ACP Folha de dados(HTML) 3 Page - Analog Devices |
3 / 32 page ADM1064 Rev. 0 | Page 3 of 32 GENERAL DESCRIPTION (continued from Page 1) The device also provides up to ten programmable inputs for monitoring under, over, or out-of-window faults on up to ten supplies. In addition, ten programmable outputs can be used as logic enables. Six of them can also provide up to a 12 V output for driving the gate of an N-channel FET, which can be placed in the path of a supply. The logical core of the device is a sequencing engine. This state- machine-based construction provides up to 63 different states. This design enables very flexible sequencing of the outputs, based on the condition of the inputs. The device is controlled via configuration data that can be programmed into an EEPROM. The whole configuration can be programmed using an intuitive GUI-based software package provided by ADI. GPI SIGNAL CONDITIONING SFD GPI SIGNAL CONDITIONING SFD SFD SFD SELECTABLE ATTENUATOR SELECTABLE ATTENUATOR DEVICE CONTROLLER OSC EEPROM SDA SCL A1 A0 SMBus INTERFACE REFOUT REFIN AUX1 AUX2 REFGND VREF 12-BIT SAR ADC ADM1064 CONFIGURABLE O/P DRIVER (HV) PDO1 PDO2 PDOGND PDO3 VCCP GND PDO4 PDO5 PDO8 PDO9 CONFIGURABLE O/P DRIVER (HV) PDO6 CONFIGURABLE O/P DRIVER (LV) PDO7 CONFIGURABLE O/P DRIVER (LV) PDO10 SEQUENCING ENGINE VX2 VX3 VX4 VP2 VP3 VP4 VH VP1 VX1 AGND VX5 VDDCAP VDD ARBITRATOR REG 5.25V CHARGE PUMP Figure 2. Detailed Block Diagram |
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