Philips Semiconductors

Product specification

74LVC273

Octal D-type flip-flop with reset; positive-edge trigger

1998 May 20

5

AC CHARACTERISTICS

LIMITS

SYMBOL

PARAMETER

WAVEFORM

UNIT

MIN

MAX

MIN

TYP

MAX

Propagation delay

CP to Qn

1

6.0

10.2

6.6

11.2

ns

Propagation delay

MR to Qn

2

6.3

11.0

7.4

12.0

ns

Clock pulse width

HIGH or LOW

1

4

1.2

5

1.8

ns

Master reset pulse

width LOW

2

4

1.2

5

1.7

ns

Removal time

MR to CP

2

2

–1.0

3

–1.0

ns

Set-up time

3

2

0.7

3

1.0

ns

Hold time

3

0

–0.6

0

–0.9

ns

Maximum clock

pulse frequency

1

125

100

MHz

NOTE:

AC WAVEFORMS

output load.

VM

VM

1/fMAX

tw

tPHL

tPLH

CP INPUT

Qn OUTPUT

SW00078

GND

clock pulse width and the maximum clock pulse frequency

MR INPUT

Qn OUTPUT

tw

tPHL

trem

CP INPUT

SY00053

GND

GND

Waveform 2. Master reset (MR) pulse width, the master reset to

(CP) removal time

VM

SW00079

GND

Dn

INPUT

GND

VM

Qn

OUTPUT

CP

INPUT

NOTE: The shaded areas indicate when the input is permitted to change

for predictable output performance.