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74LVT574D Folha de dados(PDF) 2 Page - NXP Semiconductors

Nome de Peças 74LVT574D
Descrição Electrónicos  3.3V Octal D-type flip-flop 3-State
Download  12 Pages
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Fabricante Electrônico  PHILIPS [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74LVT574D Folha de dados(HTML) 2 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74LVT574
3.3V Octal D-type flip-flop (3-State)
2
1998 Feb 19
853-1746 18988
FEATURES
Inputs and outputs on opposite side of package allow easy
interface to microprocessors
3-State outputs for bus interfacing
Common output enable
TTL input and output switching levels
Input and output interface capability to systems at 5V supply
Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
Live insertion/extraction permitted
No bus current loading when output is tied to 5V bus
Power-up 3-State
Power-up reset
Latch-up protection exceeds 500mA per JEDEC Std 17
ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTION
The LVT574 is a high-performance BiCMOS product designed for
VCC operation at 3.3V.
This device is an 8-bit, edge triggered register coupled to eight
3-State output buffers. The two sections of the device are controlled
independently by the clock (CP) and Output Enable (OE) control
gates. The state of each D input (one set-up time before the
Low-to-High clock transition) is transferred to the corresponding
flip-flop’s Q output.
The 3-State output buffers are designed to drive heavily loaded
3-State buses, MOS memories, or MOS microprocessors. The
active-Low Output Enable (OE) controls all eight 3-State buffers
independent of the clock operation.
When OE is Low, the stored data appears at the outputs. When OE
is High, the outputs are in the High-impedance “off” state, which
means they will neither drive nor load the bus.
QUICK REFERENCE DATA
SYMBOL
PARAMETER
CONDITIONS
Tamb = 25°C; GND = 0V
TYPICAL
UNIT
tPLH
tPHL
Propagation delay
CP to Qn
CL = 50pF;
VCC = 3.3V
3.6
4.3
ns
CIN
Input capacitance
VI = 0V or 3.0V
4
pF
COUT
Output capacitance
Outputs disabled;
VI/O = 0V or 3.0V
8
pF
ICCZ
Total supply current
Outputs disabled;
VCC = 3.6V
0.13
mA
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
20-Pin Plastic SOL
–40
°C to +85°C
74LVT574 D
74LVT574 D
SOT163-1
20-Pin Plastic SSOP Type II
–40
°C to +85°C
74LVT574 DB
74LVT574 DB
SOT339-1
20-Pin Plastic TSSOP Type I
–40
°C to +85°C
74LVT574 PW
74LVT574PW DH
SOT360-1
PIN CONFIGURATION
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
VCC
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
CP
OE
D0
D1
D2
D3
D4
D5
D6
D7
GND
SV00041
LOGIC SYMBOL
234
56789
11
1
CP
OE
D0
D1
D2
D3
D4
D5
D6
D7
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
19
18
17
16
15
14
13
12
SV00042


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