DM9000A
Ethernet Controller with General Processor Interface
Preliminary datasheet
2
Version: DM9000A-DS-P03
Apr. 21, 2005
Content
1. General Description………………………………………………………….…………………..………………6
2. Block Diagram …………………………………………………………………………….………………………6
3. Feature…………………………………………………………………………………….…….……………………7
4. Pin Configuration…………………………………………………………………………………………………8
4.1 Pin Configuration I: 16-bit mode……..………………………….……..……………………………………………8
4.2 Pin Configuration II: 8-bit mode…………..…………………………………………………………………………9
5. Pin Description……………………………………………………………………………………………………10
5.1 Processor Interface…..…………………………………………………………………………...…………………10
5.1.1 8-bit mode …….………………………………………………………………..…………………………………10
5.2 EEPROM Interface……………………………………………………………………………………………….…11
5.3 Clock Interface………………………………………………………………………………………………………11
5.4 LED Interface……………………………………………………….………….……………………………………11
5.5 10/100 PHY/Fiber………………………………………………….…..……………………………………………11
5.6 Miscellaneous………………………………………….…………………….………………………………………12
5.7 Power Pins………………………………………………………………………………………………..…………12
5.8 strap pins table ……………………………………………………………………………….…….…..……….…..12
6. Vendor Control and Status Register Set………………………………………………..…………………13
6.1Network Control Register (00H)…………………………………………………………………....……..…………14
6.2 Network Status Register (01H)…………………………………………………………….……….…….…………15
6.3 TX Control Register (02H)………………………………………………………………………...….…….………15
6.4 TX Status Register I ( 03H ) for packet index I………………………….………………………….………………15
6.5 TX Status Register II ( 04H ) for packet index I I…………………….………..………………….…..……………16
6.6 RX Control Register ( 05H )……………..……………………………………..……..………….…………………16
6.7 RX Status Register ( 06H )………………..…………………………………….……...……….….……….………16