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ADF4193BCPZ Folha de dados(PDF) 2 Page - Analog Devices

Nome de Peças ADF4193BCPZ
Descrição Electrónicos  Low Phase Noise, Fast Settling PLL Frequency Synthesizer
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
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ADF4193
Rev. B | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics ................................................................ 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 8
Theory of Operation ...................................................................... 11
Reference Input Section............................................................. 11
RF Input Stage............................................................................. 11
Register Map.................................................................................... 14
FRAC/INT Register (R0)........................................................... 15
MOD/R Register (R1) ................................................................ 16
Phase Register (R2) .................................................................... 17
Function Register (R3) .............................................................. 18
Charge Pump Register (R4) ...................................................... 19
Power-Down Register (R5) ....................................................... 20
Mux Register (R6) ...................................................................... 21
Programming .................................................................................. 22
Worked Example ........................................................................ 22
Spur Mechanisms ....................................................................... 22
Power-Up Initialization ............................................................. 23
Changing the Frequency of the PLL and the Phase Look-Up
Table ............................................................................................. 23
Applications..................................................................................... 25
Local Oscillator for A GSM Base Station ................................ 25
Interfacing ................................................................................... 27
PCB Design Guidelines for Chip Scale Package .................... 27
Outline Dimensions ....................................................................... 28
Ordering Guide .......................................................................... 28
REVISION HISTORY
6/06—Rev A. to Rev. B
Changes to Table 1............................................................................ 3
Changes to Figure 32...................................................................... 18
Changes to Power-Up Initialization Section............................... 23
Changes to Timer Values for Tx Section and Timer Values for
Rx Section ........................................................................................ 25
11/05—Rev 0. to Rev. A
Updated Format..................................................................Universal
Changes to Features Section............................................................ 1
Changes to Table 1............................................................................ 3
Changes to Reference Input Section ............................................ 11
Changes to RF N Divider Section ................................................ 11
Changes to the Lock Detect Section ............................................ 13
Changes to Figure 29...................................................................... 15
Changes to the 8-Bit INT Value Section ..................................... 15
Changes to Figure 33...................................................................... 19
Replaced Figure 35 ......................................................................... 21
Changes to the Σ-Δ and Lock Detect Modes Section................ 21
Changes to the Power-Up Initialization Section ........................ 23
Changes to Table 8.......................................................................... 23
Changes to the Local Oscillator for a GSM
Base Station Section ....................................................................... 25
Changes to the Timer Values for Rx Section .............................. 25
Changes to Figure 36...................................................................... 26
Updates to the Outline Dimensions ............................................ 28
Changes to the Ordering Guide ................................................... 28
4/05—Revision 0: Initial Version


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