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74F525 Folha de dados(PDF) 5 Page - National Semiconductor (TI) |
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74F525 Folha de dados(HTML) 5 Page - National Semiconductor (TI) |
5 / 10 page Timing Diagrams (Continued) TLF9547 – 8 FIGURE 4 MODE 6 Mn e 110 j With XTR HIGH the rising edge of CP loads data from the latches to the counter k With XTR LOW the rising edge of CP begins the count and Q goes HIGH l When the count reaches zero Q goes LOW and Q2 toggles state Bringing XTR HIGH before count reaches zero will reload the counter but not affect Q Notes Loading Ne0 halts counter loading Ne1 will result in undefined operation Pulse width e (2CP) (Nb1) TLF9547 – 9 FIGURE 5 MODE 7 Mn e 111 j With XTR HIGH the rising edge of CP loads data from the latches to the counter k On the falling edge of XTR the rising edge of CP begins count-down l When count reaches zero Q goes HIGH for one period of CP and Q2 toggles on the Q rising edge m On the rising edge of CP on which Q goes LOW the counters are reloaded n Count-down begins again 5 |
Nº de peça semelhante - 74F525 |
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Descrição semelhante - 74F525 |
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