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AD7938BCP-6 Folha de dados(PDF) 9 Page - Analog Devices

Nome de Peças AD7938BCP-6
Descrição Electrónicos  8-Channel, 625 kSPS, 12-Bit Parallel ADCs with a Sequencer
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Fabricante Electrônico  AD [Analog Devices]
Página de início  http://www.analog.com
Logo AD - Analog Devices

AD7938BCP-6 Folha de dados(HTML) 9 Page - Analog Devices

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AD7938-6
Rev. 0 | Page 9 of 32
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale, a point 1 LSB
below the first code transition, and full scale, a point 1 LSB
above the last code transition.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . .000) to
(00 . . . 001) from the ideal, i.e., AGND + 1 LSB.
Offset Error Match
This is the difference in offset error between any two channels.
Gain Error
This is the deviation of the last code transition (111 . . .110) to
(111 . . . 111) from the ideal (i.e., VREF – 1 LSB) after the offset
error has been adjusted out.
Gain Error Match
This is the difference in gain error between any two channels.
Zero-Code Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREF input range with −VREF to
+VREF biased about the VREFIN point. It is the deviation of the
mid scale transition (all 0s to all 1s) from the ideal VIN voltage,
i.e., VREF.
Zero-Code Error Match
This is the difference in zero-code error between any two
channels.
Positive Gain Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREF input range with −VREF to
+VREF biased about the VREFIN point. It is the deviation of the last
code transition (011. . .110) to (011 .. . 111) from the ideal (i.e.,
+VREF − 1 LSB) after the zero-code error has been adjusted out.
Positive Gain Error Match
This is the difference in positive gain error between any two
channels.
Negative Gain Error
This applies when using the twos complement output coding
option, in particular to the 2 × VREF input range with −VREF to
+VREF biased about the VREF point. It is the deviation of the first
code transition (100 . . . 000) to (100 . . . 001) from the ideal
(i.e., −VREFIN + 1 LSB) after the zero-code error has been
adjusted out.
Negative Gain Error Match
This is the difference in negative gain error between any two
channels.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of
crosstalk between channels. It is measured by applying a full-
scale sine wave signal to all seven nonselected input channels
and applying a 50 kHz signal to the selected channel. The
channel-to-channel isolation is defined as the ratio of the power
of the 50 kHz signal on the selected channel to the power of the
noise signal on the unselected channels that appears in the FFT
of this channel. The noise frequency on the unselected channels
varies from 40 kHz to 740 kHz. The noise amplitude is at 2 ×
VREF, while the signal amplitude is at 1 × VREF.
Power Supply Rejection Ratio (PSRR)
PSRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the ADC VDD supply of frequency fS. The frequency
of the noise varies from 1 kHz to 1 MHz.
PSRR (dB) = 10log(Pf/PfS)
Pf is the power at frequency f in the ADC output; PfS is the
power at frequency fS in the ADC output.
Common-Mode Rejection Ratio (CMRR)
CMRR is defined as the ratio of the power in the ADC output at
full-scale frequency, f, to the power of a 100 mV p-p sine wave
applied to the common-mode voltage of VIN+ and VIN− of
frequency fS as
CMRR (dB) = 10log (Pf/PfS)
Pf is the power at frequency f in the ADC output; PfS is the
power at frequency fS in the ADC output.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns to track mode at the end
of conversion. The track-and-hold acquisition time is the time
required for the output of the track-and-hold amplifier to reach
its final value, within ±1/2 LSB, after the end of conversion.


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