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LM1117T-1.8 Datasheet(Folha de dados) 11 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Nome de Peças. LM1117T-1.8
descrição  800mA Low-Dropout Linear Regulator
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Application Note (Continued)
The LM1117 regulators have internal thermal shutdown to
protect the device from over-heating. Under all possible
operating conditions, the junction temperature of the LM1117
must be within the range of 0˚C to 125˚C. A heatsink may be
required depending on the maximum power dissipation and
maximum ambient temperature of the application. To deter-
mine if a heatsink is needed, the power dissipated by the
regulator, P
D , must be calculated:
I
IN =IL +IG
P
D =(VIN-VOUT)I L +VINIG
Figure 6 shows the voltages and currents which are present
in the circuit.
The next parameter which must be calculated is the maxi-
mum allowable temperature rise, T
R(max):
T
R(max) = TJ(max)-TA(max)
where T
J(max) is the maximum allowable junction tempera-
ture (125˚C), and T
A(max) is the maximum ambient tem-
perature which will be encountered in the application.
Using the calculated values for T
R(max) and PD, the maxi-
mum allowable value for the junction-to-ambient thermal
resistance (
θ
JA) can be calculated:
θ
JA =TR(max)/PD
If the maximum allowable value for
θ
JA
is found to be
≥136˚C/W for SOT-223 package or ≥79˚C/W for TO-220
package or
≥92˚C/W for TO-252 package, no heatsink is
needed since the package alone will dissipate enough heat
to satisfy these requirements. If the calculated value for
θ
JA
falls below these limits, a heatsink is required.
As a design aid, Table 1 shows the value of the
θ
JA of
SOT-223 and TO-252 for different heatsink area. The copper
patterns that we used to measure these
θ
JAs are shown at
the end of the Application Notes Section. Figure 7 and Figure
8 reflects the same test results as what are in the Table 1
Figure 9 and Figure 10 shows the maximum allowable power
dissipation vs. ambient temperature for the SOT-223 and
TO-252 device. Figures Figure 11 and Figure 12 shows the
maximum allowable power dissipation vs. copper area (in
2)
for the SOT-223 and TO-252 devices. Please see AN1028
for power enhancement techniques to be used with SOT-223
and TO-252 packages.
*Application Note AN-1187 discusses improved thermal per-
formance and power dissipation for the LLP.
TABLE 1.
θ
JA Different Heatsink Area
Layout
Copper Area
Thermal Resistance
Top Side (in
2)*
Bottom Side (in
2)(
θ
JA,˚C/W) SOT-223
(
θ
JA,˚C/W) TO-252
1
0.0123
0
136
103
2
0.066
0
123
87
3
0.3
0
84
60
4
0.53
0
75
54
5
0.76
0
69
52
61
0
66
47
7
0
0.2
115
84
8
0
0.4
98
70
9
0
0.6
89
63
10
0
0.8
82
57
11
0
1
79
57
12
0.066
0.066
125
89
13
0.175
0.175
93
72
10091937
FIGURE 5. Cross-sectional view of Integrated Circuit
Mounted on a printed circuit board. Note that the case
temperature is measured at the point where the leads
contact with the mounting pad surface
10091916
FIGURE 6. Power Dissipation Diagram
www.national.com
11




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