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MC100E112FN Folha de dados(PDF) 1 Page - ON Semiconductor |
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MC100E112FN Folha de dados(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2006 November, 2006 − Rev. 8 1 Publication Order Number: MC10E112/D MC10E112, MC100E112 5VECL Quad Driver Description The MC10E/100E112 is a quad driver with two pairs of OR/NOR outputs from each gate, and a common, buffered enable input. Using the data inputs the device can serve as an ECL memory address fan-out driver. Using just the enable input, the device serves as a clock driver, although the MC10E/100E111 is designed specifically for this purpose, and offers lower skew than the E112. For memory address driver applications where scan capabilities are required, please refer to the E212 device. The 100 Series contains temperature compensation. Features • 600 ps Max. Propagation Delay • Common Enable Input • PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V • NECL Mode Operating Range: VCC = 0 V with VEE = −4.2 V to −5.7 V • Internal Input 50 kW Pulldown Resistors • ESD Protection: Human Body Model; > 2 kV, Machine Model; > 200 V • Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test • Moisture Sensitivity Level: Pb = 1 Pb−Free = 3 For Additional Information, see Application Note AND8003/D • Flammability Rating: UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34 • Transistor Count = 125 devices • Pb−Free Packages are Available* *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. MARKING DIAGRAM* xxx = 10 or 100 A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G= Pb−Free Package PLCC−28 FN SUFFIX CASE 776 MCxxxE112G AWLYYWW 1 http://onsemi.com *For additional marking information, refer to Application Note AND8002/D. See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ORDERING INFORMATION |
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