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LM1771 Folha de dados(PDF) 9 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
Nome de Peças LM1771
Descrição Electrónicos  Low-Voltage Synchronous Buck Controller with Precision Enable and No External Compensation
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Fabricante Electrônico  NSC [National Semiconductor (TI)]
Página de início  http://www.national.com
Logo NSC - National Semiconductor (TI)

LM1771 Folha de dados(HTML) 9 Page - National Semiconductor (TI)

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Application Information (Continued)
the part will be placed into a shutdown state and the drivers
will be tri-stated. This allows the LM1771 to be easily se-
quenced using a resistive divider from the output of another
regulator, or the working input voltage range of the LM1771
to be set using a resistive divider on V
IN. There is no internal
pull-up connected to the EN pin, so an external signal is
required to initiate switching. It should be noted that when
power is first applied to the LM1771, there is a slight delay
before the enable comparator is functional. During this delay,
typically on the order of 400 µs, the part will be disabled
regardless of the voltage on the EN pin. The falling enable
threshold features 50 mV of hysteresis
SOFT-START
To limit in-rush current and allow for a controlled startup the
LM1771 incorporates an internal soft-start scheme. Every
time the enable voltage rises rises above 1.2V while V
IN is
greater than the UVLO threshold, the LM1771 goes through
an adaptive soft-start that limits the on-time and expands the
minimum off-time. In addition the part will only activate the
PMOS allowing a discontinuous mode of operation enabling
a pre-biased startup. The time spent in soft-start will depend
on the load applied to the output, but is usually close to a set
time that is dependent on the timing option. The approximate
soft-start time can be seen below for each timing option.
Product ID
Timing
T
SS
LM1771S
0.5 µs
1 ms
LM1771T
1.0 µs
1.2 ms
LM1771U
2.0 µs
1.8 ms
It should be noted that as soon as soft-start terminates the
short-circuit protection is enabled. This means that if the
output voltage does not reach at least 68% of its final value
the part will latch off. Therefore, if the input supply is ex-
tremely slow rising such that at the end of soft-start the input
voltage is still near the UVLO threshold, a timing option
should be chosen to ensure that maximum duty-cycle per-
mits the output to meet the minimum condition. As a general
recommendation it is advisable to use the 2000 ns option
(LM1771U) in conditions where the output voltage is 2.5V or
greater to avoid false latch offs when there is concern re-
garding the input supply slew rate.
In some situations, the internal soft-start routine can create a
slight overshoot on the output voltage. If this must be
avoided, the use of a feed-forward capacitor as detailed in
the feed-forward capacitor section of this datasheet is rec-
ommended.
JITTER
The LM1771 utilizes an adaptive on-time control scheme
that relies on the output voltage ripple to provide a consistent
switching frequency. Under certain conditions, excessive
noise can couple onto the feedback pin causing the switch
node to appear to have a slight amount of jitter. This is not
indicative of an unstable design. The output voltage will still
regulate to the exact same value. Careful component selec-
tion and layout should minimize any external influence.
In addition to any external noise that can add to the jitter
seen on the switch node, the LM1771 will always have a
slight amount of switch jitter. This is because the LM1771
makes a small alteration in the reference voltage every 128
cycles to improve its accuracy and long term performance.
This has the effect of causing a change in the switching
frequency at that instant. When viewed on an oscilloscope
this can be seen as a jitter in the switch node. The change in
feedback voltage or output voltage, however, is almost indis-
tinguishable.
Design Guide
The following section walks the designer through the steps
necessary to select the external components to build a fully
functional power supply. As with any DC-DC converter nu-
merous trade-offs are possible to optimize the design for
efficiency, size or performance. These will be taken into
account and highlighted throughout this discussion.
The first equation to calculate for any buck converter is
duty-cycle. Ignoring conduction losses associated with the
FETs and parasitic resistances it can be approximated by:
A more accurate calculation for duty-cycle can be used that
takes into account the voltage drops across the FETs. This
equation can be used to determine the slight load depen-
dency on switch frequency if needed. Otherwise the simpli-
fied equation works well for component calculation.
FREQUENCY SELECTION
The LM1771 is available with three preset timing options that
select the on-time and hence determine the switching fre-
quency of the application. Increasing the switching fre-
quency has the effect of reducing the inductor size needed
for the application while requiring a slight trade-off in effi-
ciency. The table below shows the same frequency table as
shown earlier, with the exception that the recommended
timing option for each V
OUT is highlighted. It is not recom-
mended to use a high switching frequency with V
OUT equal
to or greater than 2.5V due to the maximum duty-cycle
limitations of the device coupled with the internal startup.
V
OUT
Timing Options
500 ns
1000 ns
2000 ns
0.8
485
242
-
1
606
303
-
1.2
727
364
-
1.5
909
455
227
1.8
-
545
273
2.5
-
-
379
3.3
-
-
500
Recommended switching frequency (kHz) based on output voltage and
timing option.
INDUCTOR SELECTION
The inductor selection is an iterative process likely requiring
several passes before settling on a final value. The reason
for this is because it influences the amount of ripple seen at
the output, a critical component to ensure general stability of
an adaptive on-time circuit. For the first pass at inductor
selection the value can be obtained by targeting a maximum
www.national.com
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