Os motores de busca de Datasheet de Componentes eletrônicos |
|
ML2002-1U Folha de dados(PDF) 11 Page - Minilogic Device Corporation Limited |
|
ML2002-1U Folha de dados(HTML) 11 Page - Minilogic Device Corporation Limited |
11 / 13 page P11/13 Preliminary, November 2008 ML2002 Preliminary Note : 1. In cascade format of ML2002(ie. ML2002-2U and –3U), one pin is the input of current ML2002 and the other is for the connection with the corresponding input pin of next ML2002. 2. Condition : FIN = 32 KHz Clock. Pin Description SYMBOL PAD DESCRIPTION BRES I External reset input (active LOW) LGND - Logic Ground INT I Alarm interrupt output LVDD - Logic Supply voltage MS I Input “0”, for slave mode DIN I Data line input DCLK I Data clock input LAI I/O It is an input pin which LOAD the display onto the LCD screen during rising edge. LAO O Send out LOAD signal to the cascade slave ML2002 for displaying data onto LCD screen. CEI I Enable Chip for receive data/command in the DIN pin CEO O Send out chip enable signal to the following cascade slave IC DOUT O Data output from the display data RAM CNT I Input clock, count number of rising edge clock Q15 O Output High on the 16th clock from CNT FIN I 32768Hz Oscillator input 4,2,1Hz O 4, 2, 1Hz clock output 256/125 Hz O 125Hz clock output for static/ 250 clock output for 1/2 duty 125/62 Hz O 62Hz clock output for static/125 clock output for 1/2 duty LCLK I LCD Clock signal frequency SEG1 .. SEG48 O Segment output COM1A / B O Common output PVDD - Power VDD supply 1/2 PVDD I 1/2 PVDD LCD driving voltage 1/2 Duty I “1” – Halfduty, “0” – Static A CEN1 , B CEN1 I Common Enable. “0” – Enable, “1” – Disable T0 I Test mode. “0” – Normal mode, “1” – Testing Mode OOUT O 32K internal clock output COEN I Crystal oscillator enable. “0” – Enable, “1” – Disable IOEN I 32K internal clock enable. “0” – Enable, “1” – Disable HPVDDEN I 1/2 PVDD enable. “0” – Enable, “1” – Disable BEN I Blink control circuit enable “0” – Enable, “1” – Disable BCLK I Blink clock input OSC+ / - I Crystal oscillator input SYNC I/O To synchronize COMMON signal to the following cascade IC TFI I Master mode 2/4 pin interface, “1” - 2pin , “0” - 4pin SYEN I SYNC enable. SYEN is “1” – SYNC output, “0” – SYNC will be high impredence. TOUT O When select 4pin interface, it would output timer data. DUM1,2,3 - Dummy Pad, Left it open only |
Nº de peça semelhante - ML2002-1U |
|
Descrição semelhante - ML2002-1U |
|
|
Ligação URL |
Privacy Policy |
ALLDATASHEETPT.COM |
ALLDATASHEET é útil para você? [ DONATE ] |
Sobre Alldatasheet | Publicidade | Contato conosco | Privacy Policy | roca de Link | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |