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MCZ33977EGR2 Folha de dados(PDF) 8 Page - Freescale Semiconductor, Inc

Nome de Peças MCZ33977EGR2
Descrição Electrónicos  Single Gauge Driver
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Fabricante Electrônico  FREESCALE [Freescale Semiconductor, Inc]
Página de início  http://www.freescale.com
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MCZ33977EGR2 Folha de dados(HTML) 8 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
8
Freescale Semiconductor
33977
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
SPI INTERFACE TIMING (CS, SCLK, SO, SI, RST) (CONTINUED)
Time from Falling Edge of CS to SO Low Impedance (22)
tSOEN
145
ns
Time from Falling Edge of CS to SO High Impedance (23)
tSODIS
1.3
4.0
µs
Time from Rising Edge of SCLK to SO Data Valid (24)
0.2 VDD = SO = 0.8 VDD, CL = 200 pF
tVALID
90
150
ns
Notes
21.
The 33977 shall meet all SPI interface timing requirements specified in the SPI Interface Timing section of this table, over the specified
temperature range. Digital interface timing is based on a symmetrical 50 percent duty cycle SCLK Clock Period of 33 ns. The device shall
be fully functional for slower clock speeds.
22.
Time required for output status data to be terminated at SO 1.0 k
Ω load on SO.
23.
Time required for output status data to be available for use at SO 1.0 k
Ω load on SO.
24.
Time required to obtain valid data out from SO following the rise of SCLK.
Table 4. Dynamic Electrical Characteristics (continued)
Characteristics noted under conditions 4.75 V
< VDD < 5.25 V, and -40°C < TA < 125°C, unless otherwise noted. Typical
values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit


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