AMIS30600AGA datasheet(6/11 Pages) AMI

Nome de Peças	AMIS30600AGA

Descrição Electrónicos	LIN Transceiver

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AMIS-30600 LIN Transceiver

Data Sheet

6.4 AC Electrical Characteristics

VCC = 4.75 to 5.25V; VBB = 7.3 to 18V; VEN > VEN,on ; Tamb = -40 to +125°C; RL = 500Ω unless specified otherwise.

Load for slope definitions (typical loads) = [L1] 1nF 1k

Ω / [L2] 6.8nF 600Ω / [L3] 10nF 500Ω.

Table 7: AC Characteristics According to LIN V1.3

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

Dynamic Transceiver Characteristics According to LIN v1.3

t _slope_F

Slope time falling edge

See Figure 6

4

-

24

µs

t _slope_R

Slope time rising edge

See Figure 6

4

-

24

µs

t _slope _Sym

Slope time symmetry

t _slope_F - t _slope_R

-8

-

+8

µs

T_rec_F

Propagation delay Bus dominant

to RxD = low; note 1

See Figure 5, 6

2

6

µs

T_rec_R

Propagation delay Bus recessive

to RxD = high; note 1

See Figure 5, 6

2

6

µs

tWAKE

Wake-up delay time

30

100

200

µs

Notes:

1.

Not measured on ATE.

VCC = 4.75 to 5.25V; VBB = 7.3 to 18V; VEN > VEN,on ; Tamb = -40 to +125°C; RL = 500Ω unless specified otherwise.

Load for slope definitions (typical loads) = [L1] 1nF 1k

Ω / [L2] 6.8nF 600Ω / [L3] 10nF 500Ω.

Table 8: AC Characteristics According to LIN V2.0

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Unit

Dynamic Receiver Characteristics according to LIN v2.0

trx_pdr

Propagation delay bus dominant

to RxD = low; note 1

See Figure 7

6

µs

trx_pdf

Propagation delay Bus recessive

to RxD = high; note 1

See Figure 7

6

µs

trx_sym

Symmetry of receiver propagation delay

trx_pdr - trx_pdf

-2

-

+2

µs

Dynamic Transmitter Characteristics according to LIN v2.0

D1

Duty cycle 1 = tBus_rec(min)/(2 x tBit);

See Figure 7

THRec(max)= 0.744 x Vbat;

THDom(max)= 0.581 x Vbat;

Vbat = 7.0V ... 18V; tBit= 50µs

0.396

0.5

D1

Duty cycle 1 = tBus_rec(min)/(2 x tBit);

See Figure 7

THRec(max)= 0.744 x Vbat;

THDom(max)= 0.581 x Vbat;

Vbat = 7.0V; tBit= 50µs;

tamb = -40°C

0.366

0.5

D2

Duty cycle 2 = tBus_rec(max)/(2 x tBit);

See Figure 7

THRec(min)= 0.284 x Vbat;

THDom(min)= 0.422 x Vbat;

Vbat = 7.6V ... 18V; tBit= 50µs;

0.5

0.581

Notes:

1.

Not measured on ATE.

AMI Semiconductor

– Rev. 2.0, Apr. 2005

6

www.amis.com

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