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93C76C Folha de dados(PDF) 7 Page - Microchip Technology

Nome de Peças 93C76C
Descrição Electrónicos  8K Microwire Compatible Serial EEPROM
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Fabricante Electrônico  MICROCHIP [Microchip Technology]
Página de início  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

93C76C Folha de dados(HTML) 7 Page - Microchip Technology

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© 2006 Microchip Technology Inc.
DS21796H-page 7
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
2.5
Erase All (ERAL)
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle
is identical to the erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed. The
rising edge of CLK before the last data bit initiates the
write cycle. Clocking of the CLK pin is not necessary
after the device has entered the ERAL cycle.
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL).
VCC must be
≥ 4.5V for proper operation of ERAL.
FIGURE 2-2:
ERAL TIMING
Note:
After the ERAL command is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
CS
CLK
DI
DO
TCSL
Check Status
10
0
1
0
x
•••
x
TSV
TCZ
Busy
Ready
High-Z
TEC
High-Z


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