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TDA9850T Folha de dados(PDF) 8 Page - NXP Semiconductors

Nome de Peças TDA9850T
Descrição Electrónicos  I2C-bus controlled BTSC stereo/SAP decoder
Download  32 Pages
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Fabricante Electrônico  PHILIPS [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

TDA9850T Folha de dados(HTML) 8 Page - NXP Semiconductors

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1995 Jun 19
8
Philips Semiconductors
Preliminary specification
I2C-bus controlled BTSC stereo/SAP decoder
TDA9850
Adjustment procedure
COMPOSITE INPUT LEVEL ADJUSTMENT
Feed in from FM demodulator the composite signal with
100% modulation (25 kHz deviation) L + R; fi = 300 Hz.
Set input level control via I2C-bus monitoring OUTL or
OUTR (500 mV
±20 mV). Store the setting in a
non-volatile memory.
AUTOMATIC ADJUSTMENT PROCEDURE
• Connect 2.2 µF capacitors from ACR and ACL to
ground.
• Composite input signal L = 300 Hz, R = 3.1 kHz,
14% modulation for each channel.
• Mode selection setting bits: STEREO = 1, SAP = 0
(see Table 8).
• Start adjustment by transmission ADJ = 1 in register
ALI3. The decoder will align itself.
• After 1 second minimum stop alignment by transmitting
ADJ = 0 in register ALI3 read the alignment data by an
I2C-bus read operation from ALR1 and ALR2
(see Chapter “I2C-bus protocol”) and store it in a
non-volatile memory. The alignment procedure
overwrites the previous data stored in ALI1 and ALI2.
• The capacitors from ACR and ACL may be
disconnected after alignment.
MANUAL ADJUSTMENT
Manual adjustment is necessary when no dual tone
generator is available (e.g. for service).
• Spectral and wideband data have to be set to 10000
(middle position for adjustment range)
• Composite input L = 300 Hz; 14% modulation
• Adjust channel separation by varying wideband data
• Composite input L = 3 kHz; 14% modulation
• Adjust channel separation by varying spectral data
• Iterative spectral/wideband operation for optimum
adjustment
• Store data in non-volatile memory.
After every power-on, the alignment data and the input
level adjustment data must be loaded from the non-volatile
memory.
TIMING CURRENT FOR RELEASE RATE
Due to possible internal and external spreading, the timing
current can be adjusted via I2C-bus, see Table 9, as
recommended by dbx.


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