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TDA9852 Folha de dados(PDF) 9 Page - NXP Semiconductors |
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TDA9852 Folha de dados(HTML) 9 Page - NXP Semiconductors |
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9 / 40 page  1997 Mar 11 9 Philips Semiconductors Preliminary specification I2C-bus controlled BTSC stereo/SAP decoder and audio processor TDA9852 dbx DECODER The circuit includes all blocks required for the noise reduction system in accordance with the BTSC system specification. The output signal is fed through a 73 µs fixed de-emphasis circuit to the dematrix block. INTEGRATED FILTERS The filter functions necessary for stereo and SAP demodulation and part of the dbx filter circuits are provided on-chip using transconductor circuits. The required filter accuracy is attained by an automatic filter alignment circuit. Audio processor SELECTOR The selector allows selecting either the internal line out signals LOR or LOL (dematrix output) or the external line in signals LIR and LIL and combines the left and right signals in several modes (see Tables 5 and 6 for subaddress and Table 11 for data). The input signal capability of the line inputs (LIR/LIL) is 2 V (RMS). The output of the selector is AC-coupled to the automatic volume level control circuit via pins SOR/SOL and AVR/AVL to avoid offset voltages. AUTOMATIC VOLUME LEVEL CONTROL The automatic volume level stage controls its output voltage to a constant level of typically 200 mV (RMS) from an input voltage range of 0.1 to 1.1 V (RMS). The circuit adjusts variations in modulation during broadcasting and due to changes in the programme material. The function can be switched off. To avoid audible ‘plops’ during the permanent operation of the AVL circuit a soft blending scheme has been applied between the different gain stages. A capacitor (4.7 µF) at pin CAV determines the attack and decay time constants. In addition the ratio of attack and decay time can be changed via I2C-bus (see Table 15). At power on, the discharged 4.7 µF capacitor at CAV must be loaded by the internal decay current. If AVL is chosen, this would result in an attenuated AVL gain for about 10 seconds after power on. This can be speeded up by choosing via I2C-bus an increased charge current (about 10 times higher) for about the first 2 seconds after power on (see Table 6, CCD bit in control 1 and Table 18). EFFECTS The audio processor section offers the following mode selections: linear stereo, pseudo stereo, spatial stereo and forced mono.The spatial mode provides an antiphase crosstalk of 30% or 52% (switchable via I2C-bus; see Table 10). VOLUME/LOUDNESS The volume control range is from +16 dB to −71 dB in steps of 1 dB and ends with a mute step (see Table 8). Balance control is achieved by the independent volume control of each channel. The volume control blocks operate in combination with the loudness control. The filter is linear when maximum gain for volume control is selected. The filter characteristic changes automatically over a range of 28 dB down to a setting of −12 dB. At −12 dB volume control the maximum loudness boost is obtained. The filter characteristic is determined by external components. The proposed application provides a maximum boost of 17 dB for bass and 4.5 dB for treble. The loudness may be switched on or off via I2C-bus control (see Table 9). The left and right volume control stages include two independent zero crossing detectors. A change in volume is automatically activated but not executed. The execution is enabled at the next zero crossing of the signal. If a new volume step is activated before the previous one has been processed, the previous value will be executed first, and then the new value will be activated. If no zero crossing occurs the next volume transmission will enforce the last activated volume setting. The zero crossing is realized between adjoining steps and between any steps, but not from any step to mute. In this case the GMU bit is needed to use. In case only one channel has to be muted, two steps are necessary. The first step is a transmission of any step to −71 dB and the second step is the −71 dB step to mute mode. The step of −71 dB to mute mode has no zero crossing but this is not relevant. |
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Descrição semelhante - TDA9852 |
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