Os motores de busca de Datasheet de Componentes eletrônicos |
|
TSA5521T Folha de dados(PDF) 8 Page - NXP Semiconductors |
|
TSA5521T Folha de dados(HTML) 8 Page - NXP Semiconductors |
8 / 24 page 1996 Oct 10 8 Philips Semiconductors Product specification 1.3 GHz universal bus-controlled TV synthesizer TSA5520; TSA5521 3-wire bus mode (SW = open-circuit or VCC1); see Figs 3, 4 and 5 During a HIGH level on the CE input, the data is clocked into the data register at the HIGH-to-LOW transition of the clock pulse. The first four bits control the band switch buffers and are loaded into the internal band switch register on the 5th rising edge of the clock pulse. The frequency bits are loaded into the frequency register at the HIGH-to-LOW transition of the chip enable line when an 18-bit or 19-bit data word is transmitted. At power-on the charge-pump current is set to 280 µA, the tuning voltage output is disabled (Vtune = 33 V in application; see Fig.12), the test bits T2, T1 and T0 are set to the normal mode and RSB is set to 1 (TSA5520) or 0 (TSA5521). When an 18-bit data word is transmitted, the most significant bit of the divider N14 is internally set to 0 and bit RSA is set to 1. When a 19-bit data word is transmitted, bit RSA is set to 0. When a 27-bit word is transmitted, the frequency bits are loaded into the frequency register on the 20th rising edge of the clock pulse and the control bits at the HIGH-to-LOW transition of the chip enable line. In this mode, the reference divider is given by the RSA and RSB bits (see Table 7). The test bits T2, T1 and T0, the charge-pump bit CP, the ratio select bit RSB and the OS bit can only be selected or changed with a 27-bit transmission. They remain programmed if an 18-bit or a 19-bit transmission occurs. Only RSA is controlled by the transmission length when the 18-bit or 19-bit format is used. A data word of less than 18 bits will not affect the frequency register of the device. The definition of the bits is unchanged compared to the I2C bus mode. The power-on detection threshold voltage VPOR is fixed to VCC1 = 2 V at room temperature. Below this threshold, the device is reset to the power-on state described above. Table 6 Test bits Table 7 Ratio select bits T2 T1 T0 DEVICE OPERATION 0 0 1 normal mode 0 1 X charge-pump is OFF 1 1 0 charge-pump is sinking current 1 1 1 charge-pump is sourcing current 100 fref is available at LOCK output 101 1 ⁄2fdiv is available at LOCK output RSA RSB REFERENCE DIVIDER X 0 640 0 1 1024 1 1 512 Fig.3 Normal mode; 18-bit data format (RSA = 1). For TSA5520 bit RSB = 1 at power-on; the reference divider is 512 or 1024. For TSA5521 bit RSB = 0 at power-on; the reference divider is 640. For TSA5520/TSA5521 the value of RSB can also be programmed by using the 27-bit data format. When returning to the normal mode, bit RSB remains as programmed with the 27-bit data word. |
Nº de peça semelhante - TSA5521T |
|
Descrição semelhante - TSA5521T |
|
|
Ligação URL |
Privacy Policy |
ALLDATASHEETPT.COM |
ALLDATASHEET é útil para você? [ DONATE ] |
Sobre Alldatasheet | Publicidade | Contato conosco | Privacy Policy | roca de Link | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |