tm

May 2007

©1993 Fairchild Semiconductor Corporation

www.fairchildsemi.com

74VHC175 Rev. 1.2

74VHC175

Quad D-Type Flip-Flop

Features

General Description

The VHC175 is an advanced high-speed CMOS device

fabricated with silicon gate CMOS technology. It

achieves the high-speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low

power dissipation.

The VHC175 is a high-speed quad D-type flip-flop. The

device is useful for general flip-flop requirements where

clock and clear inputs are common. The information on

the D inputs is stored during the LOW-to-HIGH clock

transition. Both true and complemented outputs of each

flip-flop are provided. A Master Reset input resets all flip-

flops, independent of the Clock or D inputs, when LOW.

An input protection circuit insures that 0V to 7V can be

applied to the input pins without regard to the supply

voltage. This device can be used to interface 5V to 3V

systems and two supply systems such as battery

backup. This circuit prevents device destruction due to

mismatched supply and input voltages.

Ordering Information

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the

ordering number.

Connection Diagram

Pin Description

Order Number

Package

Number

Package Description

74VHC175M

M16A

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74VHC175SJ

M16D

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHC175MTC

MTC16

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

Pin Names

Description

Data Inputs

CP

Clock Pulse Input

MR

Master Reset Input

True Outputs

Complement Outputs