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ML145428-6P Folha de dados(PDF) 2 Page - LANSDALE Semiconductor Inc.

Nome de Peças ML145428-6P
Descrição Electrónicos  Asynchronous-to-Synchronous and Synchronous-to-Asynchronous Converter
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Fabricante Electrônico  LANSDALE [LANSDALE Semiconductor Inc.]
Página de início  http://www.lansdale.com
Logo LANSDALE - LANSDALE Semiconductor Inc.

ML145428-6P Folha de dados(HTML) 2 Page - LANSDALE Semiconductor Inc.

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LANSDALE Semiconductor, Inc.
ML145428
ML145428 DSI PIN DESCRIPTIONS
VDD. POSITIVE POWER SUPPLY
The most positive power supply pin, normally 5 volts.
VSS.NEGATIVE POWER SUPPLY
The most negative supply pin, normally 0 volts.
TxD. TRANSMIT DATA INPUT
Input for asynchronous data, idle is logic high; break is 11
baud or more of logic low. One stop bit is required
RxD. RECEIVE DATA OUTPUT
Output for asynchronous data. The number of stop bits and
the data word length are selected by teh SB and DL pins. Idle
is logic high; break is a continuous logic low.
TxS. TRANSMIT STATUS OUTPUT
This pin will go low if the transmit FIFO holds 2 or more
data words or if RESET is low.
RxS. RECEIVE STATUS OUTPUT
This pin will go low if framing of the synchronous channel
is lost or not established or if RESET is low, or if the receive
FIFO is overwritten.
SB, STOP BITS INPUT
This pin controls the number of stop bits the DATA FOR-
MATTER will re–create when outputting data at the RxD
asynchronous output. A high on this pin selects two stop bits; a
low selects one stop bit.
DL, DATA LENGTH INPUT
This pin instructs the DSI to look for either 8 or 9 bits of
data to be input at the TxD asynchronous input between the
start and stop bits. The DL input also instructs the DSI’s SYN-
CHRONOUS CHANNEL RECEIVER and SYNCHRONOUS
CHANNEL TRANSMITTER to expecct 8 or 9 bit data words
and also instructs the DSI’s DATA FORMATTER to re–create
8 or 9 data bits between the start and stop bits when outputting
data at its RxD asynchronous output. A high on this pin selects
a 9 bit data word, a low selects an 8 bit data word length.


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