1

®

FN8062

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

Copyright © Intersil Americas Inc. 2003. All Rights Reserved. PRISM® is a registered trademark of Intersil Americas Inc.

PRISM Duette™ and PRISM and design are trademarks of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owner.

PRELIMINARY

ISL3893

Wireless LAN Integrated Medium Access

Controller with Baseband Processor

The Intersil ISL3893 Wireless

System on Chip (WiSOC™) is part of

the PRISM Duette™, Dual Band

radio chipset. The ISL3893 directly

interfaces with the Intersil’s ISL3690 Dual Band Direct

Conversion transceiver. Adding Intersil’s ISL3090 10GHz VCO

and Intersil’s ISL3990 Dual Band Power Amp completes an end-

to-end WLAN Chipset solution providing both 5 GHz 802.11a

and 2.4GHz 802.11b/g access point capability. The 802.11

protocol is implemented in firmware to allow custom WLAN

solutions.

Firmware implements the full IEEE 802.11 Wireless LAN

MAC protocol. It supports BSS under Distributed

Coordination Function (DCF). This allows the ISL3893 to

serve as a self hosted Access Point.

Orthogonal Frequency Division Multiplexing (OFDM)

modulated with BPSK, QPSK, 16QAM, or 64QAM and a

variety of convolutional coding rates provides 8 selectable

data rates at 2.4GHz and 5GHz. Differential phase shift

keying modulation schemes, DBPSK and DQPSK with data

scrambling capability along with Complementary Code

Keying provide 4 additional selectable data rates at 2.4GHz.

Built-in flexibility allows the ISL3893 to be configured for a

range of applications. The MAC is based on the ARM 946E

processor core that offers a wide variety of code

development support tools.

The ISL3893 is housed in a thin plastic BGA package.

Simplified Block Diagram

Features

• Firmware implements the full IEEE 802.11a/b/g Wireless

LAN MAC protocols

• Internal WEP Engine allows 64 or 128 bit Encryption

• AES Hardware Accelerator

• PC133 SDRAM Interface

• Asynchronous Flash Memory Interface

• On-Chip Boot ROM

• Instruction and Data Tightly Coupled Memory, Instruction

and Data Cache

• Firmware controlled antenna diversity

• Data Rates . . . . . . . . . . . 1, 2, 5.5, 6, 9, 11, 12, 18, 24, 36,

48, and 54Mbps

• Modulation . . OFDM with BPSK, QPSK, 16QAM, 64QAM,

DBPSK, DQPSK, CCK

• Convolutional coding and interleaving on all OFDM rates

• Targeted for OFDM Multipath Delay Spreads > 800ns for

6Mbps, and >100ns for 54Mbps

• Targeted for CCK Multipath Delay Spreads > 90ns at

11Mbps, >200ns at 5.5Mbps and >360ns at 1 and 2Mbps

• Direct interface with the ISL3690 Direct Conversion

Transceiver.

• Two Medium Independent Interfaces (MII) for ethernet

use.

• Mini-PCI Host Capability.

Applications

• High Data Rate Wireless LAN Systems Targeting the IEEE

802.11a and g Standards.

• Wireless Routers.

• Self Hosted Access Point with the capability to host a mini-

PCI daughter card for additional functionality.

Ordering Information

MAC

BB

PROCESSOR

A/D

D/A

ISL3893

EXTERNAL MEMORY

INTERFACE

PART

NUMBER

TEMP. RANGE

(°C)

PACKAGE

PKG. DWG.

#

ISL3893IK

-40 to 85

316 Lead BGA

V316.17x17

ISL3893IK-TK

-40 to 85

Tape and Reel

Data Sheet

June 2003