Os motores de busca de Datasheet de Componentes eletrônicos
  Portuguese  ▼
ALLDATASHEETPT.COM

X  

74AUP1G00 Folha de dados(PDF) 1 Page - NXP Semiconductors

Nome de Peças 74AUP1G00
Descrição Electrónicos  Low-power 2-input NAND gate
Download  16 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrônico  PHILIPS [NXP Semiconductors]
Página de início  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74AUP1G00 Folha de dados(HTML) 1 Page - NXP Semiconductors

  74AUP1G00 Datasheet HTML 1Page - NXP Semiconductors 74AUP1G00 Datasheet HTML 2Page - NXP Semiconductors 74AUP1G00 Datasheet HTML 3Page - NXP Semiconductors 74AUP1G00 Datasheet HTML 4Page - NXP Semiconductors 74AUP1G00 Datasheet HTML 5Page - NXP Semiconductors 74AUP1G00 Datasheet HTML 6Page - NXP Semiconductors 74AUP1G00 Datasheet HTML 7Page - NXP Semiconductors 74AUP1G00 Datasheet HTML 8Page - NXP Semiconductors 74AUP1G00 Datasheet HTML 9Page - NXP Semiconductors Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 16 page
background image
1.
General description
The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device,
superior to most advanced CMOS compatible TTL families.
Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
The 74AUP1G00 provides the single 2-input NAND function.
2.
Features
s Wide supply voltage range from 0.8 V to 3.6 V
s High noise immunity
s Complies with JEDEC standards:
x JESD8-12 (0.8 V to 1.3 V)
x JESD8-11 (0.9 V to 1.65 V)
x JESD8-7 (1.2 V to 1.95 V)
x JESD8-5 (1.8 V to 2.7 V)
x JESD8-B (2.7 V to 3.6 V)
s ESD protection:
x HBM JESD22-A114-C Class 3A. Exceeds 5000 V
x MM JESD22-A115-A exceeds 200 V
x CDM JESD22-C101-C exceeds 1000 V
s Low static power consumption; ICC = 0.9 µA (maximum)
s Latch-up performance exceeds 100 mA per JESD 78 Class II
s Inputs accept voltages up to 3.6 V
s Low noise overshoot and undershoot < 10 % of VCC
s IOFF circuitry provides partial Power-down mode operation
s Multiple package options
s Specified from
−40 °Cto+85 °C and −40 °C to +125 °C
74AUP1G00
Low-power 2-input NAND gate
Rev. 02 — 29 June 2006
Product data sheet


Nº de peça semelhante - 74AUP1G00

Fabricante ElectrônicoNome de PeçasFolha de dadosDescrição Electrónicos
logo
Diodes Incorporated
74AUP1G00 DIODES-74AUP1G00 Datasheet
206Kb / 11P
   SINGLE 2 INPUT POSITIVE NAND GATE
logo
Nexperia B.V. All right...
74AUP1G00 NEXPERIA-74AUP1G00 Datasheet
274Kb / 18P
   Low-power 2-input NAND gate
Rev. 8 - 13 January 2022
74AUP1G00-Q100 NEXPERIA-74AUP1G00-Q100 Datasheet
229Kb / 14P
   Low-power 2-input NAND gate
Rev. 2 - 13 January 2022
logo
Diodes Incorporated
74AUP1G00FW4-7 DIODES-74AUP1G00FW4-7 Datasheet
206Kb / 11P
   SINGLE 2 INPUT POSITIVE NAND GATE
74AUP1G00FZ4-7 DIODES-74AUP1G00FZ4-7 Datasheet
206Kb / 11P
   SINGLE 2 INPUT POSITIVE NAND GATE
More results

Descrição semelhante - 74AUP1G00

Fabricante ElectrônicoNome de PeçasFolha de dadosDescrição Electrónicos
logo
Nexperia B.V. All right...
74AUP1G00-Q100 NEXPERIA-74AUP1G00-Q100 Datasheet
229Kb / 14P
   Low-power 2-input NAND gate
Rev. 2 - 13 January 2022
74AXP1G00 NEXPERIA-74AXP1G00 Datasheet
794Kb / 17P
   Low-power 2-input NAND gate
74AUP1G00 NEXPERIA-74AUP1G00 Datasheet
274Kb / 18P
   Low-power 2-input NAND gate
Rev. 8 - 13 January 2022
74AUP2G00-Q100 NEXPERIA-74AUP2G00-Q100 Datasheet
223Kb / 13P
   Low-power dual 2-input NAND gate
Rev. 2 - 9 June 2022
logo
NXP Semiconductors
74AUP2G00 PHILIPS-74AUP2G00 Datasheet
83Kb / 16P
   Low-power dual 2-input NAND gate
Rev. 01-25 August 2006
74AUP2G00 NXP-74AUP2G00 Datasheet
537Kb / 17P
   Low-power dual 2-input NAND gate
Rev. 04-5 June 2008
logo
Nexperia B.V. All right...
74AUP2G00 NEXPERIA-74AUP2G00 Datasheet
302Kb / 20P
   Low-power dual 2-input NAND gate
Rev. 11 - 9 June 2022
logo
NXP Semiconductors
74AUP1G38 NXP-74AUP1G38 Datasheet
91Kb / 15P
   Low-power 2-input NAND gate (open drain)
Rev. 03-22 June 2009
logo
Texas Instruments
SN74AUP1G00 TI1-SN74AUP1G00_16 Datasheet
1Mb / 36P
[Old version datasheet]   Low-Power Single 2-Input Positive-NAND Gate
logo
Nexperia B.V. All right...
74AUP1G38 NEXPERIA-74AUP1G38 Datasheet
269Kb / 18P
   Low-power 2-input NAND gate (open drain)
Rev. 9 - 16 August 2022
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16


Folha de dados Download

Go To PDF Page


Ligação URL




Privacy Policy
ALLDATASHEETPT.COM
ALLDATASHEET é útil para você?  [ DONATE ] 

Sobre Alldatasheet   |   Publicidade   |   Contato conosco   |   Privacy Policy   |   roca de Link   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com