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TC9WMC2FU Folha de dados(PDF) 2 Page - Toshiba Semiconductor |
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TC9WMC2FU Folha de dados(HTML) 2 Page - Toshiba Semiconductor |
2 / 16 page TC9WMC1FK/FU,TC9WMC2FK/FU 2007-10-19 2 Block Diagram Pin Function Pin Name Input/Output Function CS Input Chip select input The device receives an instruction set when this pin is driven High. This pin must be driven Low before execution of an instruction. SK Input Serial clock input Data is latched on the rising edge of SK. Data is transferred on the rising edge of SK. This pin is valid when CS is driven High. DI Input Serial data input (start bit, op code, address and data) DO Output Serial data output TEST Input Test mode input (internal pull-down resistor) Normally kept open. (Can be connected to GND.) NC ⎯ No connection (not connected internally) VCC 1.8 to 3.6 V (for reading) 2.3 to 3.6 V (for writing) GND Power supply 0 V (GND) Control circuit Power supply (booster circuit) Memory cell Data register Timing generator Address register Input/output circuit VCC power supply GND Command register Clock input: SK Chip select: CS Address decoder Data input: DI Data output: DO Test input TEST |
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Descrição semelhante - TC9WMC2FU |
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