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TC9318AFBG Folha de dados(PDF) 4 Page - Toshiba Semiconductor |
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TC9318AFBG Folha de dados(HTML) 4 Page - Toshiba Semiconductor |
4 / 56 page TC9318AFAG/AFBG 2006-07-27 4 Explanation of Function Pin No. Symbol Pin Name Function and Operation Remarks 1 COM1 2 COM2 3 COM3 LCD common output Output common signals to the LCD panel. Through a matrix with pins S1~S23, a maximum of 69 segments can be displayed. Three levels, VLCD, VEE, and GND, are output at 83 Hz every 2 ms. VEE is output after SYSTEM RESET and CLOCK STOP are released, and a common signal is output after the DISP OFF bit is set to “0”. 4~18 S1~S15 LCD segment output 19~26 S16/KR7~ S23/KR0 LCD segment output/Key return timing output Segment signal output pins for the LCD panel. Together with COM1, COM2, and COM3, a matrix is formed that can display a maximum of 69 segments. The signals for the key matrix and the segment signals from pins S16/KR7~S23/KR0 are output on a time division basis. 4 × 8 = 32 key matrix can be created in conjunction with key input ports K0~K3. 27~30 K0~K3 Key input ports 4 bit input ports for key matrix input. Combined in a matrix with key return timing outputs of the LCD segment pins, data from a maximum of 4 × 8 = 32 keys can be input and pins are pulled up. On the key seteutining output pins, data from 4 × 6 = 24 keys can be input and pins are pulled down. The WAIT mode is released when high level is applied to key input ports set to pull-down. 31~36 T0~T5 Key return timing output port These ports output the timing signal for key matrix. To form the key matrix, load resistance has been built-in the N-channel side. When the key matrix combined with push-key, that does not need a key matrix diode. 37~40 P1-0~P1-3 I/O port 1 The input and output of these 4 bit I/O ports can be programmed in 1 bit units. By altering the input to I/O ports set to input, the CLOCK STOP and WAIT modes can be released, and the MUTE bit of the MUTE pin can be set to “1”. |
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