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MC100ES6254FAR2 Folha de dados(PDF) 1 Page - Integrated Device Technology

Nome de Peças MC100ES6254FAR2
Descrição Electrónicos  2.5/3.3V DIFFERENTIAL LVPECL 2x2 CLOCK SWITCH AND FANOUT BUFFER
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Fabricante Electrônico  IDT [Integrated Device Technology]
Página de início  http://www.idt.com
Logo IDT - Integrated Device Technology

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2.5/3.3V DIFFERENTIAL LVPECL 2x2 CLOCK SWITCH
AND FANOUT BUFFER
MC100ES6254
IDT™ / ICS™ 2.5V/3.3V LVPECL CLOCK SWITCH AND FANOUT BUFFER
1
MC100ES6254 REV. 6 OCTOBER 18, 2007
The Freescale MC100ES6254 is a bipolar monolithic differential 2x2 clock switch and
fanout buffer. Designed for most demanding clock distribution systems, the
MC100ES6254 supports various applications that require a large number of outputs to
drive precisely aligned clock signals. The device is capable of driving and switching
differential LVPECL signals. Using SiGe technology and a fully differential architecture, the
device offers superior digital signal characteristics and very low clock skew error. Target
applications for this clock driver are high performance clock/data switching, clock
distribution or data loopback in computing, networking and telecommunication systems.
Features
Fully differential architecture from input to all outputs
SiGe technology supports near-zero output skew
Supports DC to 3 GHz operation(1) of clock or data signals
LVPECL compatible differential clock inputs and outputs
LVCMOS compatible control inputs
Single 3.3 V or 2.5 V supply
50 ps maximum device skew(1)
Synchronous output enable eliminating output runt pulse generation and metastability
Standard 32 lead LQFP package
Industrial temperature range
32-lead Pb-free package available
Functional Description
MC100ES6254 is designed for very skew critical differential clock distribution systems
and supports clock frequencies from DC up to 3.0 GHz. Typical applications for the
MC100ES6254 are primary clock distribution, switching and loopback systems of high-
performance computer, networking and telecommunication systems, as well as on-board
clocking of OC-3, OC-12 and OC-48 speed communication systems. Primary purpose of
the MC100ES6254 is high-speed clock switching applications. In addition, the
MC100ES6254 can be configured as single 1:6 or dual 1:3 LVPECL fanout buffer for clock
signals, or as loopback device in high-speed data applications.
The MC100ES6254 can be operated from a 3.3 V or 2.5 V positive supply without the
requirement of a negative supply line.
1. The device is functional up to 3 GHz and characterized up to 2.7 GHz.
ORDERING INFORMATION
Device
Package
MC100ES6254FA
LQFP-32
MC100ES6254FAR2
LQFP-32
MC100ES6254AC
LQFP-32 (Pb-Free)
MC100ES6254ACR2
LQFP-32 (Pb-Free)
2.5/3.3 V DIFFERENTIAL
LVPECL 2x2
CLOCK SWITCH
AND FANOUT BUFFER
FA SUFFIX
32-LEAD LQFP PACKAGE
CASE 873A-04
AC SUFFIX
32-LEAD LQFP PACKAGE
Pb-FREE PACKAGE
CASE 873A-04


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