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SL2309NZSC-1H Folha de dados(PDF) 6 Page - SpectraLinear Inc

Nome de Peças SL2309NZSC-1H
Descrição Electrónicos  Low Jitter and Skew DC to 140 MHz Clock Buffer
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Fabricante Electrônico  SPECTRALINEAR [SpectraLinear Inc]
Página de início  http://www.spectralinear.com
Logo SPECTRALINEAR - SpectraLinear Inc

SL2309NZSC-1H Folha de dados(HTML) 6 Page - SpectraLinear Inc

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Rev 1.2, April 28, 2007
Page 6 of 8
SL2309NZ
Switching Electrical Characteristics (I-Grade – Cont.)
Unless otherwise stated VDD= 3.3V+/- 10%, CL=15pF
and Ambient Temperature range -40 to +85°C
Output Rise Time
tr
Measured at 0.8V to 2.0V
CL=0 to 30pF
1.5
ns
Output Fall Time
tf
Measured at 0.8V to 2.0V
CL=0 to 30pF
1.5
ns
Output Skew
SKW1
Measured at VDD/2 and
Outputs are equally loaded
60
120
ps
Part to Part Skew
SKW2
Measured at VDD/2 and
Outputs are equally loaded
110
250
ps
Propagation Delay Time
PDT
Measured at VDD/2 from CLKIN to
Output Clock rising edge and Outputs
are equally loaded
4.5
7.5
ns
Cycle-to-Cycle Jitter
CCJ1
CLKIN=66MHz and CL=0 (No Load)
30
60
ps
Cycle-to-Cycle Jitter
CCJ2
CLKIN=133MHz and CL=0 (No Load)
20
40
ps
External Components & Design Considerations
Typical Application Schematic
Comments and Recommendations
Decoupling Capacitor: A decoupling capacitor of 0.1 F must be used between all VDD and VSS pins. Place the
capacitor on the component side of the PCB as close to the VDD pin as possible. The PCB trace to the VDD pin and
to the GND via should be kept as short as possible. Do not use vias between the decoupling capacitor and the VDD
pin.
Series Termination Resistor: A series termination resistor is recommended if the distance between the output
clocks and the load is over 1 ½ inch. Place the series termination resistors as close to the clock outputs as possible.


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