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ISL45041IRZ Folha de dados(PDF) 4 Page - Intersil Corporation |
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ISL45041IRZ Folha de dados(HTML) 4 Page - Intersil Corporation |
4 / 7 page 4 FN6189.2 August 29, 2006 I2C SCL Clock Frequency FSCL Full 0 - 400 kHz I2C Clock High Time tSCH Full 0.6 - - µs I2C Clock Low Time tSCL Full 1.3 - - µs I2C Spike Rejection Filter Pulse Width tDSP Full 0 - 50 ns I2C Data Set-up Time tSDS Full 100 - - ns I2C Data Hold Time tSDH Full 0 - 900 ns I2C SDA, SCL Input Rise Time tICR Dependent on Load (Note 6) Full - 20 + 0.1*Cb 1000 ns I2C SDA, SCL Input Fall Time tICF (Note 6) Full - 20 + 0.1*Cb 300 ns I2C Bus Free Time Between Stop and Start tBUF Full 1.3 - - µs I2C Repeated Start Condition Set-up tSTS Full 0.6 - - µs I2C Repeated Start Condition Hold tSTH Full 0.6 - - µs I2C Stop Condition Set-up tSPS Full 0.6 - - µs I2C Bus Capacitive Load Cb Full - - 400 pF Capacitance on SDA CSDA Full - - 10 pF Capacitance on SCL CS WP = 0 Full - - 10 pF WP = 1 - - 22 pF Write Cycle Time tW Full - - 100 ms NOTES: 2. Tested at AVDD = 20V. 3. Simulated and Determined via Design and NOT Directly Tested. 4. Simulated Maximum Current Draw when Programming EEPROM is 23mA, should be considered when designing Power Supply. 5. A Typical Current of 20µA is Calculated using the AVDD = 10V and RSET = 24.9k Ω. Reference “RSET Resistor” on page 5. 6. Simulated and Designed According to I2C Specifications. 7. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested. Electrical Specifications Test Conditions: VDD = 3V, AVDD = 10V, OUT = 5V, RSET = 24.9kΩ; Unless Otherwise Specified. Typicals are at TA = +25°C (Continued) PARAMETER SYMBOL TEST CONDITIONS TEMP (°C) MIN (Note 7) TYP MAX (Note 7) UNITS ISL45041 |
Nº de peça semelhante - ISL45041IRZ |
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Descrição semelhante - ISL45041IRZ |
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