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ISL54056 Folha de dados(PDF) 5 Page - Intersil Corporation

Nome de Peças ISL54056
Descrição Electrónicos  Ultra Low ON-Resistance, 1.65V to 4.5V, Single Supply, Quad SPDT (Dual DPDT) Analog Switch
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Fabricante Electrônico  INTERSIL [Intersil Corporation]
Página de início  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL54056 Folha de dados(HTML) 5 Page - Intersil Corporation

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5
FN6357.4
August 15, 2007
NO or NC OFF Capacitance, COFF f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
38
pF
COM ON Capacitance, CCOM(ON) f = 1MHz, VNO or VNC = VCOM = 0V (See Figure 7)
25
102
pF
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = 3.6V, VIN = 0V or V+
25
0.021
μA
Full
0.72
μA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Full
0.5
V
Input Voltage High, VINH
Full
1.4
V
Input Current, IINH, IINL
V+ = 3.6V, VIN = 0V or V+
Full
-0.5
0.5
μA
Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.65V to +2V, GND = 0V, VINH = 1.0V, VINL = 0.4V (Note 4),
Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 8)
TYP
MAX
(Notes 5, 8) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, VANALOG
Full
0
V+
V
ON-Resistance, rON
V+ = 1.8V, ICOM = 100mA, VNO or VNC = 0V to V+
(See Figure 5)
25
0.65
0.8
Ω
Full
0.85
Ω
DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
V+ = 1.65V, VNO or VNC = 1.0V, RL =50Ω,
CL = 35pF (See Figure 1)
25
50
ns
Full
55
ns
Turn-OFF Time, tOFF
V+ = 1.65V, VNO or VNC = 1.0V, RL =50Ω,
CL = 35pF (See Figure 1)
25
25
ns
Full
30
ns
Break-Before-Make Time Delay, tD V+ = 2.0V, VNO or VNC = 1.0V, RL =50Ω, CL = 35pF
(See Figure 3)
Full
8
ns
Charge Injection, Q
CL = 1.0nF, VG = 0V, RG = 0Ω (See Figure 2)
25
48
pC
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL
Full
0.4
V
Input Voltage High, VINH
Full
1.0
V
Input Current, IINH, IINL
V+ = 2.0V, VIN = 0V or V+
Full
-0.5
0.5
μA
NOTES:
4. VIN = input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Flatness is defined as the difference between maximum and minimum value of ON-resistance over the specified analog signal range.
7. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON
value, between NC1 and NC2, NC3 and NC4 or between NO1 and NO2, NO3 and NO4.
8. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
Electrical Specifications - 3V Supply
Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V (Note 4),
Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 8)
TYP
MAX
(Notes 5, 8) UNITS
ISL54056


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