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CD74HC280M96G4 Folha de dados(PDF) 4 Page - Texas Instruments

Nome de Peças CD74HC280M96G4
Descrição Electrónicos  High-Speed CMOS Logic 9-Bit Odd/Even Parity Generator/Checker
Download  12 Pages
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Fabricante Electrônico  TI [Texas Instruments]
Página de início  http://www.ti.com
Logo TI - Texas Instruments

CD74HC280M96G4 Folha de dados(HTML) 4 Page - Texas Instruments

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4
Output Transition Time
tTLH, tTHL
CL = 50pF
2
-
75
95
110
ns
4.5
-
15
19
22
ns
6
-
13
16
19
ns
Input Capacitance
CI
--
-
10
10
10
pF
Power Dissipation
Capacitance
(Notes 3, 4)
CPD
-
5
58
-
-
-
pF
HCT TYPES
Propagation Delay,
Any Input to
ΣO
tPLH, tPHL
CL = 50pF
4.5
-
45
56
68
ns
CL = 15pF
5
19
-
-
-
ns
Propagation Delay,
Any Input to
ΣE
tPLH, tPHL
CL = 50pF
4.5
-
42
53
63
ns
CL = 15pF
5
18
-
-
-
ns
Output Transition Time
tTLH, tTHL
CL = 50pF
4.5
-
15
19
22
ns
Input Capacitance
CIN
--
-
10
10
10
pF
Power Dissipation
Capacitance
(Notes 3, 4)
CPD
-
5
58
-
-
-
pF
NOTES:
3. CPD is used to determine the dynamic power consumption, per package.
4. PD = VCC
2 f
i (CPD + CL) where fi = Input Frequency, fO = Output Frequency, CL = Output Load Capacitance, VCC = Supply Voltage.
Switching Specifications Input tr, tf = 6ns (Continued)
PARAMETER
SYMBOL
TEST
CONDITIONS
VCC (V)
25oC
-40oC TO 85oC
-55oC TO
125oC
UNITS
TYP
MAX
MAX
MAX
Test Circuits and Waveforms
FIGURE 1. HC TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
tPHL
tPLH
tTHL
tTLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
VCC
tr = 6ns
tf = 6ns
90%
tPHL
tPLH
tTHL
tTLH
2.7V
1.3V
0.3V
1.3V
10%
INVERTING
OUTPUT
INPUT
GND
3V
tr = 6ns
tf = 6ns
90%
CD54HC280, CD74HC280, CD54HCT280, CD74HCT280


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