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SN74AUP2G126YFPR Folha de dados(PDF) 1 Page - Texas Instruments |
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SN74AUP2G126YFPR Folha de dados(HTML) 1 Page - Texas Instruments |
1 / 16 page 1 FEATURES Seemechanicaldrawingsfordimensions. DCUPACKAGE (TOP VIEW) 3 6 1Y 2Y 8 1 V CC 1OE 5 GND 4 2A 2 7 2OE 1A YZP PACKAGE (BOTTOMVIEW) GND 5 4 2A 3 6 1Y 2Y 2 7 2OE 1A 8 V CC 1 1OE 1 2 3 4 5 6 7 8 2OE 1Y 2A 2Y 1A 1OE RSEPACKAGE (TOP VIEW) YFP PACKAGE (BOTTOMVIEW) GND 5 4 2A 3 6 1Y 2Y 2 7 2OE 1A 8 V CC 1 1OE PR EVIE W PR EVIE W DESCRIPTION/ORDERING INFORMATION AUP LVC AUP AUP LVC Static-PowerConsumption (mA) Dynamic-PowerConsumption (pF) † Single,dual,andtriplegates 3.3-V Logic † 3.3-V Logic † 0% 20% 40% 60% 80% 100% 0% 20% 40% 60% 80% 100% -0.5 0 0.5 1 1.5 2 2.5 3 3.5 0 5 10 15 20 25 30 35 40 45 Time-ns † AUP1G08dataatC =15pF L Output Input SwitchingCharacteristics at25MHz † SN74AUP2G126 LOW-POWER DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS SCES687B – JANUARY 2007 – REVISED JANUARY 2008 www.ti.com 2 • Available in the Texas Instruments NanoFree™ and Better Switching Noise Immunity at Input Package • Wide Operating V CC Range of 0.8 V to 3.6 V • Low Static-Power Consumption • Optimized for 3.3-V Operation (ICC = 0.9 µA Max) • 3.6-V I/O Tolerant to Support Mixed-Mode • Low Dynamic-Power Consumption Signal Operation (Cpd = 4 pF Typ at 3.3 V) • t pd = 4.6 ns Max at 3.3 V • Low Input Capacitance (C i = 1.5 pF Typ) • Suitable for Point-to-Point Applications • Low Noise – Overshoot and Undershoot • Latch-Up Performance Exceeds 100 mA Per <10% of VCC JESD 78, Class II • Input-Disable Feature Allows Floating Input • ESD Performance Tested Per JESD 22 Conditions – 2000-V Human-Body Model • I off Supports Partial-Power-Down Mode (A114-B, Class II) Operation – 200-V Machine Model (A115-A) • Input Hysteresis Allows Slow Input Transition – 1000-V Charged-Device Model (C101) The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see Figure 1 and Figure 2). Figure 1. AUP – The Lowest Power Family Figure 2. Excellent Signal Integrity 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 NanoFree is a trademark of Texas Instruments. UNLESS OTHERWISE NOTED this document contains Copyright © 2007–2008, Texas Instruments Incorporated PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
Nº de peça semelhante - SN74AUP2G126YFPR |
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Descrição semelhante - SN74AUP2G126YFPR |
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