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M27C322-100B6 Folha de dados(PDF) 7 Page - STMicroelectronics

Nome de Peças M27C322-100B6
Descrição Electrónicos  32 Mbit (2Mb x16) UV EPROM and OTP EPROM
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Fabricante Electrônico  STMICROELECTRONICS [STMicroelectronics]
Página de início  http://www.st.com
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M27C322
Device operation
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2
Device operation
The operating modes of the M27C322 are listed in the Operating Modes Table. A single
power supply is required in the read mode. All inputs are TTL compatible except for VPP and
12V on A9 for the Electronic Signature.
2.1
Read mode
The M27C322 has a word-wide organization. Chip Enable (E) is the power control and
should be used for device selection. Output Enable (G) is the output control and should be
used to gate data to the output pins independent of device selection. Assuming that the
addresses are stable, the address access time (tAVQV) is equal to the delay from E to output
(tELQV). Data is available at the output after a delay of tGLQV from the falling edge of GVPP,
assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV.
2.2
Standby mode
The M27C322 has a standby mode which reduces the supply current from 50mA to 100µA.
The M27C322 is placed in the standby mode by applying a CMOS high signal to the E
input.When in the standby mode, the outputs are in a high impedance state, independent of
the GVPP input.
2.3
Two line output control
Because EPROMs are usually used in larger memory arrays, this product features a 2 line
control function which accommodates the use of multiple memory connection. The two line
control function allows:
1.
the lowest possible memory power dissipation,
2.
complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E should be decoded and used as the
primary device selecting function, while GVPP should be made a common connection to all
devices in the array and connected to the READ line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.


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